Air spacer and capping structures in semiconductor devices
A semiconductor device with air spacers and air caps and a method of fabricating the same are disclosed. The semiconductor device includes a substrate and a fin structure disposed on the substrate. The fin structure includes a first fin portion and a second fin portion. The semiconductor device further includes a source/drain (S/D) region disposed on the first fin portion, a contact structure disposed on the S/D region, a gate structure disposed on the second fin portion, an air spacer disposed between a sidewall of the gate structure and the contact structure, a cap seal disposed on the gate structure, and an air cap disposed between a top surface of the gate structure and the cap seal.
1. A method, comprising:
forming a polysilicon structure on a fin structure;
forming a gate spacer along a sidewall of the polysilicon structure;
forming an epitaxial region on the fin structure;
replacing the polysilicon structure with a gate structure adjacent to the gate spacer;
forming an air spacer between the gate structure and the gate spacer;
forming a spacer seal on the air spacer;
forming, on the gate structure, an air cap comprising etching the gate structure to expose a sidewall of the gate spacer; and
forming a cap seal on the air cap and the spacer seal.
2. The method of claim 1 , wherein forming the air spacer comprises:
forming a sacrificial spacer along a sidewall of the polysilicon structure; and
removing the sacrificial spacer after replacing the polysilicon structure.
3. The method of claim 2 , wherein forming the air cap comprises:
forming a sacrificial cap on the gate structure and the sacrificial spacer; and
removing the sacrificial cap after forming the spacer seal.
4. The method of claim 1 , wherein forming the air cap comprises:
etching the gate structure to expose sidewalls of gate spacers adjacent to the gate structure; and
depositing a sacrificial layer directly on the gate structure and along the sidewalls of the gate spacers.
5. The method of claim 1 , wherein forming the air cap comprises:
etching a top portion of the gate structure;
forming a sacrificial cap on the gate structure;
thinning down the sacrificial cap; and
removing the thinned down sacrificial cap after forming the spacer seal.
6. The method of claim 1 , wherein forming the spacer seal comprises forming a first seal portion on the air spacer and a second seal portion on the air cap.
7. The method of claim 1 , wherein forming the spacer seal comprises forming a first seal portion on the air spacer and a second seal portion directly on the gate structure.
8. The method of claim 1 , wherein forming the spacer seal on the air spacer comprises:
depositing a sealing layer on the air spacer and the gate structure; and
etching the sealing layer to form an opening on the gate structure.
9. The method of claim 1 , wherein forming the cap seal comprises depositing an insulating layer directly on a top surface of the air cap and directly on a top surface and sidewalls of the spacer seal.
10. A method, comprising:
depositing a dielectric layer along a sidewall of a polysilicon structure;
replacing the polysilicon structure with a gate structure on a substrate;
forming a gate spacer comprising a spacer layer and a first air gap along a sidewall of the gate structure, wherein the first air gap extends above a top surface of the gate structure;
depositing a sealing layer on the dielectric layer, the first air gap, and the gate structure;
etching the sealing layer to form a first seal along a sidewall of the dielectric layer and a second seal on the first air gap;
forming a capping structure comprising a second air gap on the top surface of the gate structure and adjacent to the first air gap; and
forming a conductive structure adjacent to the first air gap and the capping structure.
11. The method of claim 10 , wherein etching the sealing layer forms a third seal on the gate structure.
12. The method of claim 10 , wherein forming the gate spacer comprises:
forming a sacrificial spacer along a sidewall of the polysilicon structure; and
etching the sacrificial spacer to form the first air gap.
13. The method of claim 10 , wherein forming the gate spacer comprises:
forming an oxide spacer along a sidewall of the polysilicon structure;
forming a sacrificial spacer on the oxide spacer; and
etching the sacrificial spacer to expose a sidewall of the oxide spacer.
14. The method of claim 10 , wherein forming the capping structure comprises:
depositing an insulating layer on the gate structure and the spacer layer; and
etching the insulating layer to expose a top surface and a sidewall of the spacer layer.
15. The method of claim 14 , wherein forming the capping structure further comprises:
etching the insulating layer to form the second air gap along a sidewall of the spacer layer and on the gate structure.
16. A method, comprising:
forming a gate structure on a substrate;
forming first gate spacers along sidewalls of the gate structure;
forming second gate spacers on the first gate spacers;
depositing etch stop layers on the second gate spacers;
removing the second gate spacers to form air spacers between the first gate spacers and the etch stop layers;
depositing a sealing layer on top of the air spacers, in contact with top surfaces and sidewalls of the first gate spacers and the etch stop layers, and on a top surface of the gate structure; and
etching the sealing layer to remove first portions of the sealing layer from the top surfaces of the first gate spacers, while second portions of the sealing layer remain on the top surfaces of the etch stop layer.
17. The method of claim 16 , further comprising forming an air cap on the gate structure after depositing the sealing layer.
18. The method of claim 16 , wherein etching the sealing layer comprises removing third portions of the sealing layer from the top surface of the gate structure.
19. The method of claim 16 , further comprising depositing a sacrificial capping layer on the first and second gate spacers and the gate structure.
20. The method of claim 19 , further comprising removing the sacrificial capping layer after removing the second gate spacers.