Cache structure and utilization
Embodiments are generally directed to cache structure and utilization. An embodiment of an apparatus includes one or more processors including a graphics processor; a memory for storage of data for processing by the one or more processors; and a cache to cache data from the memory; wherein the apparatus is to provide for dynamic overfetching of cache lines for the cache, including receiving a read request and accessing the cache for the requested data, and upon a miss in the cache, overfetching data from memory or a higher level cache in addition to fetching the requested data, wherein the overfetching of data is based at least in part on a current overfetch boundary, and provides for data is to be prefetched extending to the current overfetch boundary.
1 . An apparatus comprising:
one or more processors including a graphics processing unit (GPU); and
a memory for storage of data for processing by the one or more processors;
wherein the one or more processors include a cache to cache data from the memory for use by the one or more processors, the cache including least recently used (LRU) information; and
wherein the apparatus is to provide for processing of the cache, including:
monitoring operation of the cache, the monitoring of the cache including monitoring the LRU information of the cache and monitoring cache lines for potential pre-eviction,
detecting a low activity period in operation of the cache,
identifying one or more cache lines of the cache as dirty based at least in part on the monitoring of the LRU information for the cache, and scrubbing the identified one or more cache lines during the low activity period prior to allocation of the one or more cache lines for fetched data, wherein scrubbing the identified one or more cache lines includes writing data from the one or more cache lines back to a source, and
identifying one or more cache lines for pre-eviction based at least in part on the monitoring, and evicting data from the one or more cache lines prior to allocation of the one or more cache lines for fetched data.
2 . The apparatus of claim 1 , wherein:
monitoring operation of the cache further includes detecting an eviction pattern for cache lines in the cache; and
identifying the one or more cache lines for pre-eviction includes identifying cache lines based on the detected eviction pattern.
3 . The apparatus of claim 1 , wherein the apparatus is further to provide for receiving and handling read requests for the cache following the processing of the cache.
4 . The apparatus of claim 1 , wherein the cache is a GPU cache.
5 . The apparatus of claim 1 , wherein the cache is one of an L2 (Level 2) cache or an L3 (Level 3) cache.
6 . One or more non-transitory computer-readable storage mediums having stored thereon executable computer program instructions that, when executed by one or more processors, cause the one or more processors to perform operations comprising:
monitoring operation of a cache in a computing system, the computing system including one or more processors including a graphics processing unit (GPU), wherein the cache includes least recently used (LRU) information and wherein monitoring operation of the cache includes monitoring the LRU information of the cache and monitoring cache lines for potential pre-eviction;
detecting a low activity period in operation of the cache;
identifying one or more cache lines of the cache as dirty based at least in part on the monitoring, and scrubbing the identified one or more cache lines during the low activity period prior to allocation of the one or more cache lines for fetched data, wherein scrubbing the identified one or more cache lines includes writing data from the one or more cache lines back to a source; and
identifying one or more cache lines for pre-eviction based at least in part on the monitoring, and evicting data from the one or more cache lines prior to allocation of the one or more cache lines for fetched data.
7 . The one or more storage mediums of claim 6 , wherein:
monitoring operation of the cache further includes detecting an eviction pattern for cache lines in the cache; and
identifying the one or more cache lines for pre-eviction includes identifying cache lines based on the detected eviction pattern.
8 . The one or more storage mediums of claim 6 , wherein the instructions further include instructions that, when executed by one or more processors, cause the one or more processors to perform operations comprising:
receiving and handling read requests for the cache following the processing of the cache.
9 . A method comprising:
monitoring operation of a cache in a computing system, the computing system including one or more processors including a graphics processing unit (GPU), wherein the cache includes least recently used (LRU) information and wherein monitoring operation of the cache includes monitoring the LRU information of the cache and monitoring cache lines for potential pre-eviction;
detecting a low activity period in operation of the cache;
identifying one or more cache lines of the cache as dirty based at least in part on the monitoring, and scrubbing the identified one or more cache lines during the low activity period prior to allocation of the one or more cache lines for fetched data, wherein scrubbing the identified one or more cache lines includes writing data from the one or more cache lines back to a source; and
identifying one or more cache lines for pre-eviction based at least in part on the monitoring, and evicting data from the one or more cache lines prior to allocation of the one or more cache lines for fetched data.
10 . The method of claim 9 , wherein:
monitoring operation of the cache further includes detecting an eviction pattern for cache lines in the cache; and
identifying the one or more cache lines for pre-eviction includes identifying cache lines based on the detected eviction pattern.
11 . The method of claim 9 , further comprising:
receiving and handling read requests for the cache following the processing of the cache.