Granted Patent B2

US 12,730,759 · App. 18/905,667 · Granted Sep 8, 2026

Inventors: Altug Koker (El Dorado Hills, CA); Joydeep Ray (Folsom, CA); Elmoustapha Ould-Ahmed-Vall (Chandler, AZ); Abhishek Appu (El Dorado Hills, CA); Aravindh Anantaraman (Folsom, CA); Valentin Andrei (San Jose, CA); Durgaprasad Bilagi (Folsom, CA); Varghese George (Folsom, CA); Brent Insko (Portland, OR); Sanjeev Jahagirdar (Folsom, CA); Scott Janus (Loomis, CA); Pattabhiraman K (Bangalore, IN); SungYe Kim (Folsom, CA); Subramaniam Maiyuran (Gold River, CA); Vasanth Ranganathan (El Dorado Hills, CA); Lakshminarayanan Striramassarma (Folsom, CA); Xinmin Tian (Union City, CA)

Assignee: INTEL CORPORATION

G06F12/123G06F12/0875G06F12/0891G06T1/60G06F2212/302

Abstract

Claims (27)

1 . A graphics processor comprising:

processing resources to perform graphics operations; and

a cache controller of a cache coupled to the processing resources, the cache controller is configured to set an initial aging policy using an aging field based on age of cache lines within the cache memory and to determine whether a hint or an instruction to indicate a direction level of aging has been received, wherein the aging field comprises a multi-bit age field, wherein the hint at an instruction level includes attributes indicating plural age levels.

2 . The graphics processor of claim 1 , wherein the cache controller is further configured to modify an aging policy when the hint or instruction to indicate a direction level of aging is received, wherein the initial aging policy comprises a least recently used data or cache line policy.

3 . The graphics processor of claim 2 , wherein the modified aging policy comprises one or more of an age or a level of importance as provided via a user level exposure.

4 . The graphics processor of claim 3 , wherein the level of importance includes a first level of importance to preserve data longer in the cache for a first time period, wherein the level of importance further includes a second level of importance for data to be evicted from the cache within a second time period, which is less than the first time period.

5 . The graphics processor of claim 3 , wherein the modified aging policy comprises a multi-bit cache policy, and wherein the modified aging policy is further modified based on receiving a hint or an instruction.

6 . A method comprising:

initializing, by a cache controller of a processing circuitry of a computing device, cache memory with allocated cache lines;

setting an initial aging policy based on age of one or more of the cache lines within the cache memory; and

determining whether a hint or an instruction having attributes to indicate a level of aging has been received, wherein the aging field comprises a multi-bit age field, wherein the hint at an instruction level includes attributes indicating plural age levels.

7 . The method of claim 6 , further comprising:

implementing the initial aging policy if no hints or instructions have been received.

8 . The method of claim 6 , further comprising:

modifying, by the cache controller, the initial aging policy when the hint or the instruction having attributes is received.

9 . The method of claim 8 , wherein the modified aging policy comprises one or more of an age or a level of importance as provided via a user level exposure.

10 . The method of claim 9 , wherein the level of importance includes a first level of importance to preserve data longer in the cache for a first time period, wherein the level of importance further includes a second level of importance for data to be evicted from the cache within a second time period, which is less than the first time period, wherein the processing circuitry is coupled to a memory, the processing circuitry having graphics processing circuitry.

11 . At least one computer-readable medium having stored thereon instructions which, when executed, cause a computing device to perform operations comprising:

initializing, by a cache controller of processing circuitry of the computing device, cache memory with allocated cache lines;

setting an initial aging policy based on age of one or more of the cache lines within the cache memory; and

determining whether a hint or an instruction having attributes to indicate a level of aging has been received, wherein the aging field comprises a multi-bit age field, wherein the hint at an instruction level includes attributes indicating plural age levels.

12 . The computer-readable medium of claim 11 , wherein the operations further comprise:

implementing the initial aging policy if no hints or instructions have been received.

13 . The computer-readable medium of claim 11 , wherein the operations further comprise:

modifying, by the cache controller, the initial aging policy when the hint or the instruction having attributes is received.

14 . The computer-readable medium of claim 13 , wherein the modified aging policy comprises one or more of an age or a level of importance as provided via a user level exposure.

15 . The computer-readable medium of claim 14 , wherein the level of importance includes a first level of importance to preserve data longer in the cache for a first time period, wherein the level of importance further includes a second level of importance for data to be evicted from the cache within a second time period, which is less than the first time period, wherein the processing circuitry is coupled to a memory, the processing circuitry having graphics processing circuitry.

Assignments (1)

Continuity (6)

References Cited (400)