Semiconductor device and method of forming vertical interconnect structure with conductive micro via array for 3-D Fo-WLCSP
View Patent ↗A semiconductor device includes a semiconductor die. An encapsulant is deposited over the semiconductor die. A conductive micro via array is formed outside a footprint of the semiconductor die and over the semiconductor die and encapsulant. A first through-mold-hole (TMH) is formed including a step-through-hole structure through the encapsulant to expose the conductive micro via array. An insulating layer is formed over the semiconductor die and the encapsulant. A micro via array is formed through the insulating layer and outside the footprint of the semiconductor die. A conductive layer is formed over the insulating layer. A conductive ring is formed comprising the conductive micro via array. A second TMH is formed partially through the encapsulant to a recessed surface of the encapsulant. A third TMH is formed through the encapsulant and extending from the recessed surface of the encapsulant to the conductive micro via array.
1. A method of making a semiconductor device, comprising:
providing a semiconductor die;
depositing an encapsulant over the semiconductor die;
forming a conductive micro via array outside a footprint of the semiconductor die and over the encapsulant; and
forming a first through-mold-hole (TMH) through the encapsulant extending to the conductive micro via array.
2. The method of claim 1 , wherein forming the conductive micro via array includes:
forming an insulating layer over the semiconductor die and the encapsulant;
forming a micro via array through the insulating layer and outside the footprint of the semiconductor die; and
forming a conductive layer over the insulating layer and into the micro via array.
3. The method of claim 1 , the conductive micro via array includes a conductive ring.
4. The method of claim 1 , further including:
forming a second TMH partially through the encapsulant to a recessed surface of the encapsulant; and
forming a third TMH through the encapsulant within a footprint of the second TMH having a cross-sectional width less than a cross-sectional width of the second TMH and extending from the recessed surface of the encapsulant to the conductive micro via array.
5. The method of claim 1 , further including forming a build-up interconnect structure over the semiconductor die.
6. The method of claim 1 , further including forming an insulating layer over the semiconductor die for structural support.
7. A method of making a semiconductor device, comprising:
providing a semiconductor die;
depositing an encapsulant over the semiconductor die; and
forming a conductive micro via array including a plurality of conductive vias over the encapsulant and outside a footprint of the semiconductor die.
8. The method of claim 7 , further including forming a first through-mold-hole (TMH) comprising a step-through-hole structure through the encapsulant extending to the conductive micro via array.
9. The method of claim 8 , further including:
forming a second TMH partially through the encapsulant to a recessed surface of the encapsulant; and
forming a third TMH through the encapsulant and within a footprint of the second TMH, the third TMH comprising a cross-sectional width less than a cross-sectional width of the second TMH and extending from the recessed surface of the encapsulant to the conductive micro via array.
10. The method of claim 8 , further including forming a conductive interconnect structure within the first TMH.
11. The method of claim 7 , wherein forming the conductive micro via array includes:
forming an insulating layer over the encapsulant and the semiconductor die;
forming a micro via array through the insulating layer and outside the footprint of the semiconductor die; and
forming a conductive layer over the insulating layer and into the micro via array.
12. The method of claim 11 , wherein the insulating layer includes a polymer composite including glass fiber.
13. The method of claim 7 , further including forming an insulating layer over the semiconductor die for structural support.
14. A method of making a semiconductor device, comprising:
providing a semiconductor die;
forming an encapsulant over the semiconductor die;
forming an insulating layer over the encapsulant;
forming a conductive micro via array through the insulating layer; and
forming an opening in the encapsulant extending to the conductive micro via array.
15. The method of claim 14 , further including forming an interconnect structure over the encapsulant.
16. The method of claim 14 , wherein the conductive micro via array includes a conductive ring.
17. The method of claim 14 , wherein the insulating layer includes a polymer composite including glass fiber.
18. The method of claim 14 , wherein the opening includes a step-through-hole structure formed through the encapsulant extending to the conductive micro via array.
19. The method of claim 18 , wherein the step-through-hole structure includes:
forming a first through-mold-hole (TMH) partially through the encapsulant; and
forming a second TMH through the encapsulant and within a footprint of the first TMH.
20. The method of claim 14 , further including removing a portion of the encapsulant.
21. A method of making a semiconductor device, comprising:
providing a semiconductor die;
forming an insulating layer over the semiconductor die; and
forming a conductive micro via array including a plurality of commonly connected conductive vias through the insulating layer.
22. The method of claim 21 , further including forming an interconnect structure over the insulating layer.
23. The method of claim 21 , wherein the conductive micro via array further includes a conductive ring.
24. The method of claim 21 , wherein the insulating layer further includes a polymer composite including glass fiber.
25. The method of claim 21 , further including:
forming an encapsulant over the semiconductor die; and
forming an opening through the encapsulant extending to the conductive micro via array.
26. The method of claim 25 , further including removing a portion of the encapsulant.
27. The method of claim 25 , further including forming a bump within the opening over the conductive micro via array.
28. The method of claim 14 , further including forming a bump within the opening over the conductive micro via array.
29. A method of making a semiconductor device, comprising:
providing an insulating layer;
forming a conductive layer over the insulating layer, the conductive layer including an array of conductive vias extending from the conductive layer through the insulating layer;
providing a semiconductor component over the insulating layer; and
depositing an encapsulant over the semiconductor component and insulating layer.
30. The method of claim 29 , further including removing a portion of the encapsulant.
31. The method of claim 29 , further including forming an opening through the encapsulant extending to the array of conductive vias.
32. The method of claim 31 , wherein the opening includes a step-through-hole structure.
33. The method of claim 31 , further including forming a bump within the opening over the array of conductive vias.
34. The method of claim 29 , further including forming a conductive ring around the array of conductive vias.
35. The method of claim 29 , further including forming an interconnect structure over the insulating layer and array of conductive vias.