IP Library Granted Patent US 11,630,791
Granted Patent B2
US 11,630,791 · App. 17/244,799 · Granted Apr 18, 2023

Data storage system and method for multiple communication protocols and memory access

Inventors: Mark Moshayedi (Newport Coast, CA); Seyed Jalal Sadr (Irvine, CA)
Assignee: Western Digital Technologies, Inc.
G06F13/28G06F3/0611G06F3/0659G06F3/0679G06F12/0246G06F13/102G06F13/1668G06F13/4068G06F13/42G06F2212/7202
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Quick Facts
Patent No.
US 11,630,791
App. No.
17/244,799
Granted
Apr 18, 2023
Kind
B2
Abstract

A flash storage device provides direct memory access based on a first communication protocol. A host selects the first communication protocol and provides a request to the flash storage device for a direct memory access. Additionally, the host provides data blocks to the flash storage device for the direct memory access. In the first communication protocol, the host need not provide an address to the flash storage device for the direct memory access. The flash storage device stores the data blocks at sequential addresses starting at a predetermined address in the flash storage device. Another host may then select a second communication protocol and transfer the data blocks in the flash storage by using the second communication protocol.

Claims (78)

1. A method for a data storage system, the method comprising:

connecting the data storage system to a first host;

in response to a write request from the first host, receiving a first select signal from the first host identifying a first communication protocol from the first communication protocol or a second communication protocol;

selecting the first communication protocol based on the first select signal;

writing a first data from the first host into a memory of the data storage system using the first communication protocol between the first host and the memory;

disconnecting the data storage system from the first host;

connecting the data storage system to a second host; and

in response to a read request from the second host, reading the first data from the memory of the data storage system using the second communication protocol between the second host and the memory without receiving a select signal to select the second communication protocol,

wherein the second communication protocol is different from the first communication protocol.

2. The method of claim 1 ,

wherein the writing the first data from the first host into the memory is without an address for a direct memory access provided by the first host.

3. The method of claim 2 , wherein the writing the first data from the first host into the memory is without a logic to generate the address for the direct memory access provided by the first host.

4. The method of claim 1 ,

wherein the second communication protocol is a communication protocol of an interface of the data storage system unless the first select signal is received.

5. The method of claim 1 , wherein:

writing the first data into the memory comprises performing a first direct memory access operation to write the first data into the memory using the first communication protocol; and

reading the first data from the memory comprises performing a second direct memory access operation to read the first data from the memory using the second communication protocol.

6. The method of claim 1 , wherein:

the first host supports the first communication protocol and does not support the second communication protocol; and

the second host supports the second communication protocol and does not support the first communication protocol.

7. The method of claim 5 , wherein:

writing the first data into the memory comprises performing a direct memory access operation; and

performing the direct memory access operation comprises:

receiving a data block from the first host using the first communication protocol;

erasing a storage block in the data storage system; and

writing the data block to the storage block using the first communication protocol.

8. A data storage system, comprising:

a memory; and

one or more controllers configured to cause:

connecting the data storage system to a first host;

in response to a write request from the first host, receiving a first select signal from the first host identifying a first communication protocol from the first communication protocol or a second communication protocol;

selecting the first communication protocol based on the first select signal;

writing a first data from the first host into the memory using the first communication protocol between the first host and the memory;

disconnecting the data storage system from the first host;

connecting the data storage system to a second host; and

in response to a read request from the second host, reading the first data from the memory of the data storage system using the second communication protocol between the second host and the memory without receiving a select signal to select the second communication protocol,

wherein the second communication protocol is different from the first communication protocol.

9. The data storage system of claim 8 , wherein

the writing the first data from the first host into the memory is without an address for a direct memory access provided by the first host.

10. The data storage system of claim 9 , wherein the writing the first data from the first host into the memory is without a logic to generate the address for the direct memory access provided by the first host.

11. The data storage system of claim 8 , wherein

the second communication protocol is a communication protocol used by an interface of the data storage system unless the first select signal is received.

12. The data storage system of claim 8 , wherein:

writing the first data into the memory comprises performing a first direct memory access operation to write the first data into the memory using the first communication protocol; and

reading the first data from the memory comprises performing a second direct memory access operation to read the first data from the memory using the second communication protocol.

13. The data storage system of claim 8 , wherein:

the first host is configured to support the first communication protocol and not support the second communication protocol; and

the second host is configured to support the second communication protocol and not support the first communication protocol.

14. The data storage system of claim 8 , wherein:

writing the first data into the memory comprises performing a direct memory access operation; and

performing the direct memory access operation comprises:

receiving a data block from the first host using the first communication protocol;

erasing a storage block in the data storage system; and

writing the data block to the storage block using the first communication protocol.

15. The data storage system of claim 8 , wherein the second communication protocol is a standard communication protocol, and the first communication protocol is a non-standard communication protocol.

16. The data storage system of claim 8 , wherein:

writing the first data into the memory comprises performing a direct memory access operation; and

performing the direct memory access operation comprises:

receiving a first data block from the first host using the first communication protocol;

storing the first data block in the data storage system at a predetermined address using the first communication protocol;

receiving a second data block from the first host;

incrementing the predetermined address to determine a next address; and

storing the second data block in the data storage system at the next address using the first communication protocol.

17. An apparatus, comprising:

means for connecting a data storage system to a first host;

in response to a write request from the first host, means for receiving a first select signal from the first host identifying a first communication protocol from the first communication protocol or a second communication protocol;

means for selecting the first communication protocol based on the first select signal;

means for writing a first data from the first host into a memory of the data storage system using the first communication protocol between the first host and the memory;

means for disconnecting the data storage system from the first host;

means for connecting the data storage system to a second host; and

in response to a read request from the second host, means for reading the first data from the memory of the data storage system using the second communication protocol between the second host and the memory without receiving a select signal to select the second communication protocol,

wherein the second communication protocol is different from the first communication protocol.

18. The apparatus of claim 17 ,

wherein the means for writing the first data from the first host into the memory is without an address for a direct memory access provided by the first host.

19. The apparatus of claim 18 , wherein the means for writing the first data from the first host into the memory is without a logic to generate the address for the direct memory access provided by the first host.

20. The apparatus of claim 17 , wherein:

the means for writing the first data comprises means for performing a first direct memory access operation to write the first data into the memory using the first communication protocol; and

the means for reading the first data comprises means for performing a second direct memory access operation to read the first data from the memory using the second communication protocol.

Assignments (13)
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2024
From: SANDISK TECHNOLOGIES, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 069168/0273 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 057651 FRAME 0296 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058981/0958 →
SECURITY INTEREST Recorded Sep 17, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 057651/0296 →
CHANGE OF NAME Recorded May 6, 2021
From: STEC, INC.
To: HGST TECHNOLOGIES SANTA ANA, INC.
Reel/Frame 056177/0886 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 6, 2021
From: HGST TECHNOLOGIES SANTA ANA, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 056158/0147 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 6, 2021
From: SADR, SEYED JALAL
To: STEC, INC.
Reel/Frame 056158/0098 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 6, 2021
From: MOSHAYEDI, MARK
To: STEC, INC.
Reel/Frame 056158/0058 →
Continuity (6)
Continuation 16911312 · Jun 24, 2020
Continuation 16554519 · Aug 28, 2019
Continuation 15971971 · May 4, 2018
Continuation 15156267 · May 16, 2016
Continuation 12508531 · Jul 23, 2009
Related Publication 20210248096A1 · Aug 12, 2021