IP Library › Granted Patent US 12,342,615
Granted Patent B2
US 12,342,615 · App. 18/296,793 · Granted Jun 24, 2025

Semiconductor device and method of manufacturing the same

Inventors: Shinya Yamakawa (Kanagawa, JP); Yasushi Tateshita (Kanagawa, JP)
Assignee: Sony Group Corporation
H10D84/856H01L21/28518H01L21/31053H01L21/3212H10D30/0212H10D30/601H10D30/792H10D30/797H10D62/021H10D64/017H10D64/62H10D84/0165H10D84/0167H10D84/017H10D84/0172H10D84/0184H10D84/0186H10D84/038H10D84/85
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Quick Facts
Patent No.
US 12,342,615
App. No.
18/296,793
Granted
Jun 24, 2025
Kind
B2
Abstract

A semiconductor device including, in cross section, a semiconductor substrate; a gate insulating film on the semiconductor substrate; a gate electrode on the gate insulating film, the gate electrode including a metal, a side wall insulating film at opposite sides of the gate electrode, the side wall insulating film contacting the substrate; a stress applying film at the opposite sides of the gate electrode and over at least a portion of the semiconductor substrate, at least portion of the side wall insulating film being between the gate insulating film and the stress applying film and in contact with both of them; source/drain regions in the semiconductor substrate at the opposite sides of the gate electrode, and silicide regions at surfaces of the source/drain regions at the opposite sides of the gate electrode, the silicide regions being between the source/drain regions and the stress applying layer and in contact with the stress applying layer.

Claims (14)

1. A semiconductor device comprising:

a side wall insulating film formed on a semiconductor substrate with a trench;

a gate insulating film and a gate electrode formed on the semiconductor substrate within the trench;

a first stress applying film formed after the trench is form and located along the side wall insulating film over the semiconductor substrate; and

source/drain regions formed in the semiconductor substrate on opposite sides of the gate electrode.

2. The semiconductor device according to claim 1 , wherein the semiconductor device is an n-type transistor and the first stress applying film has a tensile stress.

3. The semiconductor device according to claim 1 , wherein the semiconductor device is an p-type transistor and the first stress applying film has a compressive stress.

4. The semiconductor device according to claim 1 , further comprising:

a second stress applying film on the first stress applying film.

5. The semiconductor device according to claim 1 , wherein the first stress applying film is formed of silicon nitride.

6. The semiconductor device according to claim 1 , further comprising:

silicide regions at surfaces of the source/drain regions at the opposite sides of the gate electrode, the silicide regions being between the source/drain regions and the first stress applying film and in contact with the first stress applying film.

7. The semiconductor device according to claim 5 , wherein the silicide regions do not extend under the side wall insulating film.

8. The semiconductor device according to claim 1 , further comprising a lightly doped drain region in the substrate.

Priority Claims (2)
JP 2007-072968 · Mar 20, 2007 · national
JP 2008-018513 · Jan 30, 2008 · national
Continuity (8)
Continuation 17245638 · Apr 30, 2021
Continuation 16727218 · Dec 26, 2019
Continuation 16241395 · Jan 7, 2019
Continuation 15852041 · Dec 22, 2017
Continuation 15154365 · May 13, 2016
Continuation 14669803 · Mar 26, 2015
Continuation 12530797
Related Publication 20230246032A1 · Aug 3, 2023
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