Ground-connected supports with insulating spacers for semiconductor memory capacitors and method of fabricating the same
A semiconductor device may comprise: a plurality of lower electrodes which are on a substrate; a first electrode support which is between adjacent lower electrodes and comprises a metallic material; a dielectric layer which is on the lower electrodes and the first electrode support to extend along profiles of the first electrode support and each of the lower electrodes; and an upper electrode which is on the dielectric layer.
1. A method of fabricating a semiconductor device, the method comprising:
forming a mold structure on a substrate, the mold structure comprising a mold layer, an electrode support layer comprising a conductive material, and a lower electrode hole penetrating the mold layer and the electrode support layer;
forming a lower electrode in the lower electrode hole penetrating the mold layer and the electrode support layer such that the lower electrode penetrates the mold layer and the electrode support layer;
forming a mask pattern on the lower electrode and the electrode support layer;
forming an electrode support by patterning the electrode support layer using the mask pattern;
exposing sidewalls of the lower electrode by removing the mold layer using the electrode support; and
sequentially forming a dielectric layer and an upper electrode on the exposed sidewalls of the lower electrode and an upper surface of the lower electrode.
2. The method of claim 1 , further comprising:
forming an insulating spacer layer to partially cover sidewalls of the lower electrode hole.
3. The method of claim 2 , wherein the forming the lower electrode is performed after the forming the insulating spacer layer.
4. The method of claim 2 , wherein the insulating spacer layer covers an upper surface of the electrode support layer, and
the method further comprises forming an insulating spacer between the lower electrode and the electrode support layer by removing the insulating spacer layer on the upper surface of the electrode support layer while forming the lower electrode.
5. The method of claim 1 , further comprising:
forming a sacrificial layer to fill a part of the lower electrode hole;
forming an insulating spacer on sidewalls of the lower electrode hole exposed by the sacrificial layer; and
removing the sacrificial layer after forming the insulating spacer.
6. The method of claim 1 , further comprising:
forming a ground plug electrically connected to the electrode support.
7. The method of claim 6 , further comprising:
exposing a part of the electrode support prior to forming the ground plug.
8. The method of claim 1 , wherein the forming the mold structure comprises:
sequentially forming the mold layer and the electrode support layer on the substrate; and
forming the lower electrode hole by sequentially etching the electrode support layer and the mold layer.
9. A method of fabricating a semiconductor device, the method comprising:
forming a mold structure including a lower electrode hole on a substrate, the mold structure comprising a mold layer and an electrode support layer;
forming a lower electrode in the lower electrode hole;
forming an electrode support by patterning the electrode support layer;
exposing sidewalls of the lower electrode by removing the mold layer using the electrode support;
sequentially forming a dielectric layer and an upper electrode on the exposed sidewalls of the lower electrode and an upper surface of the lower electrode;
exposing a part of the electrode support by removing a part of each of the dielectric layer and the upper electrode; and
forming a first ground plug connected to the exposed electrode support.
10. The method of claim 9 , wherein the electrode support layer comprises a conductive material, and
wherein the first ground plug is electrically connected to the exposed electrode support.
11. The method of claim 9 , further comprising:
forming an upper plate electrode on the upper electrode,
wherein the exposed electrode support is formed by removing a part of the dielectric layer, the upper electrode and the upper plate electrode.
12. The method of claim 11 , further comprising:
forming a support connection pattern in contact with the electrode support, the upper electrode and the upper plate electrode,
wherein the support connection pattern comprises a conductive material.
13. The method of claim 11 , further comprising:
forming a second ground plug in contact with the upper plate electrode,
wherein the first ground plug is in contact with the exposed electrode support.
14. The method of claim 9 , further comprising:
forming an upper plate electrode on the upper electrode,
wherein the upper plate electrode is in contact with the exposed electrode support.
15. The method of claim 9 , further comprising:
forming an insulating spacer layer to partially cover sidewalls of the lower electrode hole,
wherein the forming the lower electrode is performed after the forming the insulating spacer layer.
16. The method of claim 15 , wherein the insulating spacer layer covers an upper surface of the electrode support layer, and
the method further comprises forming an insulating spacer between the lower electrode and the electrode support layer by removing the insulating spacer layer on the upper surface of the electrode support layer while forming the lower electrode.
17. The method of claim 9 , further comprising:
forming a sacrificial layer to fill a part of the lower electrode hole;
forming an insulating spacer on sidewalls of the lower electrode hole exposed by the sacrificial layer; and
removing the sacrificial layer after forming the insulating spacer.
18. A method of fabricating a semiconductor device, the method comprising:
forming a mold structure on a substrate, the mold structure comprising a first mold layer, a first electrode support layer, a second mold layer and a second electrode support layer sequentially stacked on the substrate and a lower electrode hole penetrating the first mold layer, the second electrode support layer, the second mold layer, and the first electrode support layer, the first electrode support layer comprising an insulating material, and the second electrode support layer comprising a conductive material;
forming a lower electrode in the lower electrode hole penetrating the first mold layer, the first electrode support layer, the second mold layer, and the second electrode support layer such that the lower electrode penetrates the first mold layer, the first electrode support layer, the second mold layer, and the second electrode support layer;
forming a first electrode support and a second electrode support by patterning the first electrode support layer and the second electrode support layer;
exposing sidewalls of the lower electrode by removing the first mold layer and the second mold layer using the first electrode support and the second electrode support;
sequentially forming a dielectric layer and an upper electrode on the exposed sidewalls of the lower electrode and an upper surface of the lower electrode; and
forming a ground plug electrically connected to the second electrode support.
19. The method of claim 18 , further comprising:
exposing a part of the second electrode support prior to forming the ground plug.
20. The method of claim 18 , further comprising:
forming an insulating spacer layer to partially cover sidewalls of the lower electrode hole.