IP Library › Granted Patent US 12,426,364
Granted Patent B2
US 12,426,364 · App. 18/604,752 · Granted Sep 23, 2025

Display device and semiconductor device

Inventor: Mizuki Sato (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H10D86/441H10D30/67H10D30/6744H10D30/6745H10D30/6746H10D30/6757H10D86/421H10D86/471H10D86/481H10D86/60H10H29/142H10K59/1213H10K59/1216H10K59/124G02F1/1362H10B12/30H10K59/131
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Quick Facts
Patent No.
US 12,426,364
App. No.
18/604,752
Granted
Sep 23, 2025
Kind
B2
Abstract

An object is to provide a display device with a high aperture ratio or a semiconductor device in which the area of an element is large. A channel formation region of a TFT with a multi-gate structure is provided under a wiring that is provided between adjacent pixel electrodes (or electrodes of an element). In addition, a channel width direction of each of a plurality of channel formation regions is parallel to a longitudinal direction of the pixel electrode. In addition, when a channel width is longer than a channel length, the area of the channel formation region can be increased.

Claims (98)

1. A display device comprising a pixel, the pixel comprising:

a first transistor;

a second transistor;

a first wiring comprising a region which functions as a power supply line;

a second wiring comprising a region which functions as a signal line;

a third wiring comprising a region which functions as a scanning line;

an EL element; and

a first conductive layer,

wherein one of a source and a drain of the second transistor is electrically connected to a gate of the first transistor,

wherein a gate of the second transistor is electrically connected to the third wiring,

wherein a current from the first wiring is supplied to the EL element through the first transistor and the first conductive layer,

wherein the first transistor is configured to function as a driving transistor,

wherein, in a plane view, each of the first wiring and the second wiring comprises a region extending in a first direction,

wherein a width of the first wiring is larger than a width of the second wiring,

wherein the first transistor comprises a first channel formation region comprising a region overlapping with the first wiring and positioned below the first wiring,

wherein the second transistor comprises a second channel formation region comprising a region overlapping with the first wiring and positioned below the first wiring,

wherein a channel length direction of the second transistor intersects with a channel length direction of the first transistor, and

wherein, in the plane view the first wiring comprises a region between the second wiring and the first conductive layer.

2. The display device according to claim 1 ,

wherein the first conductive layer comprises the same material as the first wiring.

3. The display device according to claim 1 ,

wherein the first wiring comprises a first region and a second region,

wherein the first region of the first wiring has a first width,

wherein the second region of the first wiring has a second width,

wherein the first width is smaller than the second width,

wherein, in the plane view, the first conductive layer is adjacent to the first region of the first wiring, and

wherein the second region of the first wiring comprises a region overlapping with the first channel formation region.

4. The display device according to claim 1 ,

wherein, in the plane view, the first channel formation region of the first transistor comprises a bent shape.

5. The display device according to claim 1 ,

wherein the first channel formation region of the first transistor comprises polycrystalline silicon.

6. A display device comprising a pixel, the pixel comprising:

a first transistor;

a second transistor;

a first wiring comprising a region which functions as a power supply line;

a second wiring comprising a region which functions as a signal line;

a third wiring comprising a region which functions as a scanning line;

an EL element; and

a first conductive layer,

wherein one of a source and a drain of the second transistor is electrically connected to a gate of the first transistor,

wherein a gate of the second transistor is electrically connected to the third wiring,

wherein a current from the first wiring is supplied to the EL element through the first transistor and the first conductive layer,

wherein the first transistor is configured to function as a driving transistor,

wherein, in a plane view, each of the first wiring and the second wiring comprises a region extending in a first direction,

wherein a width of the first wiring is larger than a width of the second wiring,

wherein the first transistor comprises a first channel formation region comprising a region overlapping with the first wiring and positioned below the first wiring,

wherein the second transistor comprises a second channel formation region comprising a region overlapping with the first wiring and positioned below the first wiring,

wherein a channel length direction of the second transistor intersects with a channel length direction of the first transistor,

wherein, in the plane view, the first wiring comprises a region between the second wiring and the first conductive layer, and

wherein the channel length direction of the second transistor is the same direction as the first direction.

7. The display device according to claim 6 ,

wherein the first conductive layer comprises the same material as the first wiring.

8. The display device according to claim 6 ,

wherein the first wiring comprises a first region and a second region,

wherein the first region of the first wiring has a first width,

wherein the second region of the first wiring has a second width,

wherein the first width is smaller than the second width,

wherein, in the plane view, the first conductive layer is adjacent to the first region of the first wiring, and

wherein the second region of the first wiring comprises a region overlapping with the first channel formation region .

9. The display device according to claim 6 ,

wherein, in the plane view, the first channel formation region of the first transistor comprises a bent shape.

10. The display device according to claim 6 ,

wherein the first channel formation region of the first transistor comprises polycrystalline silicon.

11. A display device comprising a pixel, the pixel comprising:

a first transistor;

a second transistor;

a first wiring comprising a region which functions as a power supply line;

a second wiring comprising a region which functions as a signal line;

a third wiring comprising a region which functions as a scanning line;

an EL element; and

a first conductive layer,

wherein one of a source and a drain of the second transistor is electrically connected to a gate of the first transistor,

wherein a gate of the second transistor is electrically connected to the third wiring,

wherein a current from the first wiring is supplied to the EL element through the first transistor and the first conductive layer,

wherein the first transistor is configured to function as a driving transistor,

wherein, in a plane view, each of the first wiring and the second wiring comprises a region extending in a first direction,

wherein a width of the first wiring is larger than a width of the second wiring,

wherein the first transistor comprises a first channel formation region comprising a region overlapping with the first wiring and positioned below the first wiring,

wherein the second transistor comprises a second channel formation region comprising a region overlapping with the first wiring and positioned below the first wiring,

wherein a channel length direction of the second transistor intersects with a channel length direction of the first transistor,

wherein the channel length direction of the second transistor is the same direction as the first direction,

wherein, in the plane view, the first wiring comprises a region between the second wiring and the first conductive layer,

wherein the pixel further comprises a capacitor,

wherein a second conductive layer comprises a region functioning as the gate of the first transistor and a region functioning as one electrode of the capacitor, and

wherein the second conductive layer comprises a region overlapping with the first wiring and positioned below the first wiring.

12. The display device according to claim 11 ,

wherein the first conductive layer comprises the same material as the first wiring.

13. The display device according to claim 11 ,

wherein the first wiring comprises a first region and a second region,

wherein the first region of the first wiring has a first width,

wherein the second region of the first wiring has a second width,

wherein the first width is smaller than the second width,

wherein, in the plane view, the first conductive layer is adjacent to the first region of the first wiring, and

wherein the second region of the first wiring comprises a region overlapping with the first channel formation region .

14. The display device according to claim 11 ,

wherein, in the plane view, the first channel formation region of the first transistor comprises a bent shape.

15. The display device according to claim 11 ,

wherein the first channel formation region of the first transistor comprises polycrystalline silicon.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 14, 2024
From: SATO, MIZUKI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD
Reel/Frame 066772/0650 →
Priority Claims (1)
JP 2006-199292 · Jul 21, 2006 · national
Continuity (15)
Continuation 18120022 · Mar 10, 2023
Continuation 17104235 · Nov 25, 2020
Continuation 16833829 · Mar 30, 2020
Continuation 16718273 · Dec 18, 2019
Continuation 16240834 · Jan 7, 2019
Continuation 15874939 · Jan 19, 2018
Continuation 15421611 · Feb 1, 2017
Continuation 14989886 · Jan 7, 2016
Continuation 14726752 · Jun 1, 2015
Continuation 14661078 · Mar 18, 2015
Continuation 14275962 · May 13, 2014
Continuation 13848878 · Mar 22, 2013
Continuation 12982200 · Dec 30, 2010
Continuation 11772924 · Jul 3, 2007
Related Publication 20240224673A1 · Jul 4, 2024
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