Semiconductor device
A semiconductor device includes a substrate having a first and second surface opposite to each other, and an active region on the first surface and defined by a first isolation region; a plurality of active fins on the active region, extending in a first direction, and defined by a second isolation region having a second depth smaller than a first depth of the first isolation region; a buried conductive wiring in a trench adjacent to the fins, and extending in a direction of the trench; a filling insulation portion in the trench, and having the wiring therein; an interlayer insulation layer on the first and second isolation regions and on the buried conductive wiring; a contact structure penetrating the interlayer insulation layer, and contacting the buried conductive wiring; and a conductive through structure extending through the substrate from the second surface to the trench, and contacting the buried conductive wiring.
1 . A method of manufacturing a semiconductor architecture, the method comprising:
providing a substrate having a first surface and a second surface opposite to each other, the substrate comprising an active region on the first surface and a plurality of active fins arranged on the active region;
forming a first trench in the active region adjacent to the plurality of active fins;
forming a first insulation layer covering the plurality of active fins on the substrate;
forming a second trench in a portion of the first insulation layer disposed in the first trench, the second trench exposing a bottom surface of the first trench;
forming a buried conductive structure in the second trench, the buried conductive structure having an upper surface being lower than an upper surface of the first insulation layer;
forming a second insulation layer on the first insulation layer, the second insulation layer having a portion filling in the second trench;
recessing the first and second insulation layers to expose portions of the plurality of active fins;
forming a source or drain region on at least one of the exposed portions of the plurality of active fins;
forming a conductive structure electrically connecting the source or drain region to the buried conductive structure; and
forming a conductive through-structure in the substrate, the conductive through-structure extending from the second surface of the substrate to the buried conductive structure.
2 . The method according to claim 1 , wherein the recessed first insulation layers are a device isolation layer, the portions of the plurality of active fins protrude from an upper surface of the device isolation layer, and
the recessed second insulation layers are a filling insulation portion on the buried conductive structure and in the second trench.
3 . The method according to claim 2 , wherein the device isolation layer has an upper surface substantially coplanar with an upper surface of the filling insulation portion.
4 . The method according to claim 2 , wherein the upper surface of the buried conductive structure is higher than an upper surface of the active region and lower than upper ends of the plurality of active fins.
5 . The method according to claim 1 , wherein the second trench exposes a portion of the active region.
6 . The method according to claim 1 , wherein the conductive through-structure penetrates the substrate and has an upper end contacting a portion of the first insulating layer in the first trench.
7 . The method according to claim 6 , wherein the upper end of the conductive through-structure is higher than a bottom surface of the buried conductive structure.
8 . The method according to claim 1 , wherein the first trench has a first width greater than a second width of the second trench.
9 . The method according to claim 1 , wherein the buried conductive structure is surrounded by the portion the first insulation layer in the first trench.
10 . The method according to claim 1 , wherein the buried conductive structure comprises a conductive material, and a conductive barrier on a side surface and a lower surface of the conductive material.
11 . The method according to claim 10 , wherein the buried conductive structure further comprises a dielectric barrier between the conductive barrier and the portion of the first insulation layer.
12 . The method according to claim 1 , wherein the conductive through-structure comprises a conductive material, and comprises a dielectric liner between the conductive material and the substrate.
13 . The method according to claim 1 , wherein the conductive structure comprises a contact structure contacting the source or drain region, and the contact structure has an extension portion extending to the buried conductive structure.
14 . The method according to claim 13 , further comprising
forming an interlayer insulation layer on the recessed first and second insulation layer to cover the source or drain region; and
forming a first wiring portion on the interlayer insulation layer, the first wiring portion electrically connected to the contact structure.
15 . The method according to claim 1 , further comprising forming a second wiring portion on the second surface of the substrate, the second wiring portion electrically connected to the conductive through-structure.
16 . A method of manufacturing a semiconductor architecture, the method comprising:
providing a substrate having a first surface and a second surface opposite to each other, the substrate comprising an active region on the first surface and a plurality of active fins arranged on the active region;
forming a first insulation layer covering the plurality of active fins on the substrate;
forming a trench in the first insulation layer, a bottom surface of the trench provided by the active region;
forming a buried conductive structure in the trench, the buried conductive structure having an upper surface being lower than an upper surface of the first insulation layer;
forming a second insulation layer on the first insulation layer, the second insulation layer having a portion filling in the trench;
recessing the first and second insulation layers to expose portions of the plurality of active fins;
forming a source or drain region on at least one of the exposed portions of the plurality of active fins;
forming a conductive structure electrically connecting the source or drain region to the buried conductive structure; and
forming a conductive through-structure in the substrate, the conductive through-structure extending from the second surface of the substrate to the buried conductive structure.
17 . The method according to claim 16 , wherein the trench extends into the active region, and the buried conductive structure has a bottom surface being lower than the upper surface of the active region.
18 . The method according to claim 17 , wherein the buried conductive structure comprises a conductive material, and a dielectric barrier on a side surface of the conductive material, and the dielectric barrier extends to a lower surface of the conductive material excluding a contact area with the conductive through-structure.
19 . The method according to claim 16 , wherein the upper surface of the buried conductive structure is higher than an upper surface of the active region and lower than upper ends of the plurality of active fins.
20 . A method of manufacturing a semiconductor architecture, the method comprising:
providing a substrate having a first surface and a second surface opposite to each other, the substrate comprising an active region on the first surface and a plurality of active fins arranged on the active region;
forming a first trench in the active region adjacent to the plurality of active fins;
forming a first insulation layer covering the plurality of active fins on the substrate;
forming a second trench in a portion of the first insulation layer disposed in the first trench, the second trench exposing a portion of the active region, and having a width being smaller than a width of the first trench;
forming a buried conductive structure in the second trench, the buried conductive structure having an upper surface being higher than an upper surface of the active region and lower than upper ends of the plurality of active fins;
forming a second insulation layer on the first insulation layer, the second insulation layer having a portion filling in the second trench; and
recessing the first and second insulation layers to expose portions of the plurality of active fins,
wherein the recessed first insulation layers are a device isolation layer, the portions of the plurality of active fins protrude from an upper surface of the device isolation layer, and the recessed second insulation layers is a filling insulation portion on the buried conductive structure and in the second trench,
wherein the device isolation layer has an upper surface being substantially coplanar with an upper surface of the filling insulation portion.