IP Library › Granted Patent US 12,581,700
Granted Patent B2
US 12,581,700 · App. 18/472,704 · Granted Mar 17, 2026

Semiconductor device

Inventors: Yuki Nakano (Kyoto, JP); Ryota Nakamura (Kyoto, JP)
Assignee: ROHM CO., LTD.
H10D62/109H10D12/031H10D30/025H10D30/63H10D30/668H10D62/102H10D62/107H10D62/127H10D62/292H10D62/393H10D62/405H10D62/8325H10D64/513H10D84/83H01L21/046H10D30/665H10D62/157H10D64/256
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Quick Facts
Patent No.
US 12,581,700
App. No.
18/472,704
Granted
Mar 17, 2026
Kind
B2
Abstract

A semiconductor device includes a semiconductor layer made of a wide bandgap semiconductor and including a gate trench; a gate insulating film formed on the gate trench; and a gate electrode embedded in the gate trench to be opposed to the semiconductor layer through the gate insulating film. The semiconductor layer includes a first conductivity type source region; a second conductivity type body region; a first conductivity type drift region; a second conductivity type first breakdown voltage holding region; a source trench passing through the first conductivity type source region and the second conductivity type body region from the front surface and reaching a drain region; and a second conductivity type second breakdown voltage region selectively formed on an edge portion of the source trench where the sidewall and the bottom wall thereof intersect with each other in a parallel region of the source trench.

Claims (27)

1 . A semiconductor device comprising:

an SiC semiconductor layer having a gate trench provided with a sidewall and a bottom wall;

a gate insulating film formed on the sidewall and the bottom wall of the gate trench; and

a gate electrode embedded in the gate trench to be opposed to the SiC semiconductor layer through the gate insulating film, wherein

the SiC semiconductor layer includes:

a first conductivity type source region formed on a front surface side of the SiC semiconductor layer;

a second conductivity type body region formed on the front surface side of the SiC semiconductor layer such that the second conductivity type body region is in contact with the first conductivity type source region;

a source breakdown voltage holding region that is partially in contact with the second conductivity type body region;

a first conductivity type drift region formed on a rear surface side of the SiC semiconductor layer such that the first conductivity type drift region is in contact with the source breakdown voltage holding region; and

a second conductivity type gate breakdown voltage holding region formed at the bottom wall of the gate trench, the second conductivity type gate breakdown voltage holding region having a width narrower than a width of the gate trench, wherein

the source breakdown voltage holding region extends deeper into semiconductor layer than the bottom wall of the gate trench in a thickness direction of the SiC semiconductor layer, such that a bottom portion of the source breakdown voltage holding region is located closer to the rear surface of the SiC semiconductor layer than the bottom wall of the gate trench, and

the first conductivity type drift region has a laminated structure including a low-concentration region and a high-concentration region in the thickness direction of the SiC semiconductor layer in the sectional view.

2 . The semiconductor device according to claim 1 , further comprising a source electrode electrically connected to the first conductivity type source region, wherein

the source breakdown voltage holding region is connected below the source electrode.

3 . The semiconductor device according to claim 1 , wherein the source breakdown voltage holding region includes a body contact region that is electrically connected to the second conductivity type body region.

4 . The semiconductor device according to claim 1 , wherein the source breakdown voltage holding region is covered with the high-concentration region.

5 . The semiconductor device according to claim 2 , wherein the source electrode includes a convex portion embedded in the SiC semiconductor layer.

6 . The semiconductor device according to claim 1 , wherein

a plurality of gate trenches in a lateral direction perpendicular to the thickness direction of the SiC semiconductor layer in the sectional view are formed, and

the source breakdown voltage holding region is formed between the adjacent gate trenches.

7 . The semiconductor device according to claim 1 , wherein the first conductivity type source region forms a part of the side wall of the gate trench.

8 . The semiconductor device according to claim 1 , wherein the second conductivity type body region forms a part of the side wall of the gate trench.

9 . The semiconductor device according to claim 6 , wherein the source breakdown voltage holding region is away from the adjacent gate trenches in the lateral direction.

10 . The semiconductor device according to claim 1 , wherein the source breakdown voltage holding region is wider than the gate trench in a lateral direction perpendicular to the thickness direction of the SiC semiconductor layer in the sectional view.

11 . The semiconductor device according to claim 1 , wherein

the source breakdown voltage holding region has a width in a lateral direction perpendicular to the thickness direction of the SiC semiconductor layer in the sectional view and a depth from the front surface of the SiC semiconductor layer in the thickness direction,

the width of the source breakdown voltage holding region is larger than the depth of the source breakdown voltage holding region.

Priority Claims (2)
JP 2011-020730 · Feb 2, 2011 · national
JP 2011-101786 · Apr 28, 2011 · national
Continuity (7)
Continuation 17464296 · Sep 1, 2021
Continuation 16865267 · May 1, 2020
Continuation 16050794 · Jul 31, 2018
Continuation 15441850 · Feb 24, 2017
Continuation 14821056 · Aug 7, 2015
Continuation 13983051
Related Publication 20240014258A1 · Jan 11, 2024
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