Via for semiconductor device connection
A method for forming a via in a semiconductor device and a semiconductor device including the via are disclosed. In an embodiment, the method may include bonding a first terminal and a second terminal of a first substrate to a third terminal and a fourth terminal of a second substrate; separating the first substrate to form a first component device and a second component device; forming a gap fill material over the first component device, the second component device, and the second substrate; forming a conductive via extending from a top surface of the gap fill material to a fifth terminal of the second substrate; and forming a top terminal over a top surface of the first component device, the top terminal connecting the first component device to the fifth terminal of the second substrate through the conductive via.
1 . A semiconductor device comprising:
a first substrate comprising a first terminal and a second terminal;
a component device comprising a second substrate and a third terminal on the second substrate, the third terminal being bonded to the first terminal;
a gap fill material on the first substrate and surrounding the component device;
a conductive via extending from a top surface of the gap fill material to the second terminal; and
a top terminal extending along a top surface of the component device and a top surface of the conductive via, the top terminal electrically coupling the component device to the second terminal through the conductive via.
2 . The semiconductor device of claim 1 , wherein a first distance between the top surface of the gap fill material and the first substrate is greater than a second distance between the top surface of the component device and the first substrate.
3 . The semiconductor device of claim 1 , further comprising:
a conformal protection layer between the gap fill material and each of the first substrate and the component device.
4 . The semiconductor device of claim 1 , wherein the conductive via comprises a barrier layer in contact with the gap fill material and the second terminal and a conductive fill material on the barrier layer.
5 . The semiconductor device of claim 4 , wherein a top surface of the barrier layer, a top surface of the conductive fill material, and the top surface of the gap fill material are level with one another.
6 . The semiconductor device of claim 1 , wherein the top terminal is electrically coupled to a top semiconductor layer of the second substrate.
7 . The semiconductor device of claim 6 , further comprising:
a passivation layer on and in contact with the top terminal and the top semiconductor layer.
8 . A semiconductor device comprising:
a first conductive pad and a second conductive pad over a substrate;
a first component device comprising:
a bottom terminal coupled to the first conductive pad; and
a plurality of semiconductor layers over the bottom terminal, a lower semiconductor layer of the semiconductor layers being coupled to the bottom terminal;
a conductive via coupled to the second conductive pad;
a gap fill material surrounding the conductive via and the first component device, a top surface of the gap fill material being level with a top surface of the conductive via; and
a top terminal extending through the gap fill material, the top terminal coupling the conductive via to an upper semiconductor layer of the semiconductor layers.
9 . The semiconductor device of claim 8 , further comprising:
a conformal dielectric layer lining the first component device, the conductive via extending through the conformal dielectric layer.
10 . The semiconductor device of claim 8 , wherein a top surface of the first conductive pad is level with a top surface of the second conductive pad.
11 . The semiconductor device of claim 8 , further comprising:
a passivation layer over the top terminal and the upper semiconductor layer.
12 . The semiconductor device of claim 8 , wherein the conductive via has a first height that is greater than a second height of the first component device.
13 . The semiconductor device of claim 8 , further comprising:
a first dielectric layer over the substrate, the first conductive pad and the second conductive pad extending through the first dielectric layer;
a second dielectric layer over the first dielectric layer, the conductive via extending through the second dielectric layer; and
a conductive connector extending through the second dielectric layer and coupling the first conductive pad to the bottom terminal.
14 . The semiconductor device of claim 8 , further comprising:
a third conductive pad over the substrate; and
a second component device comprising a bottom terminal coupled to the third conductive pad, the gap fill material surrounding the second component device, the conductive via located between the first component device and the second component device.
15 . A semiconductor device comprising:
a first metal pad and a second metal pad over a first substrate;
a conductive connector contacting the first metal pad;
a component device comprising a bottom terminal and a semiconductor layer, the bottom terminal contacting the conductive connector;
a gap fill material surrounding the component device;
a conductive via extending through the gap fill material, the conductive via contacting the second metal pad; and
a top terminal extending through the gap fill material, the top terminal contacting the semiconductor layer and the conductive via.
16 . The semiconductor device of claim 15 , further comprising:
a protective layer contacting a side surface of the bottom terminal, the gap fill material surrounding the protective layer.
17 . The semiconductor device of claim 15 , further comprising:
a passivation layer contacting the gap fill material and the top terminal.
18 . The semiconductor device of claim 15 , wherein the component device is a light emitting diode.
19 . The semiconductor device of claim 15 , wherein the conductive connector comprises a solder material.
20 . The semiconductor device of claim 15 , wherein a top surface of the gap fill material is level with a top surface of the conductive via.