Semiconductor device with integrated deep trench capacitors
A semiconductor device includes an application processor (AP) die and a memory die directly bonded to the AP die. The memory die includes a substrate, a non-volatile memory structure on the substrate, and at least one trench capacitor in the substrate.
1 . A semiconductor device, comprising:
an application processor (AP) die; and
a memory die directly bonded to the AP die, wherein the memory die comprises a substrate, a non-volatile memory structure on the substrate, and at least one trench capacitor in the substrate, wherein a first hybrid bond pad and a second hybrid bond pad are disposed on an upper surface of the memory die, wherein the first hybrid bond pad is a memory pin for transmitting read, erase, or program signals between the AP die and the memory die, and the second hybrid bond pad is a power pin for transmitting power signals.
2 . The semiconductor device according to claim 1 , wherein the at least one trench capacitor is a decoupling capacitor.
3 . The semiconductor device according to claim 1 , wherein the non-volatile memory structure comprises a magneto-resistive random access memory (MRAM) structure, a resistive random access memory (RRAM) structure, ferroelectric random access memory (FRAM) structure, embedded flash (eflash) memory structure, or a phase-change random access memory (PCRAM) structure.
4 . The semiconductor device according to claim 1 , wherein the at least one trench capacitor is electrically connected to the second hybrid bond pad.
5 . The semiconductor device according to claim 1 , wherein the first and second hybrid bond pads are directly bonded to third and fourth hybrid bond pads on the AP die, respectively, through hybrid bonding.
6 . The semiconductor device according to claim 5 , wherein the first hybrid bond pad, the second hybrid bond pad, the third hybrid bond pad, and the fourth hybrid bond pad are copper pads.
7 . The semiconductor device according to claim 1 , wherein the at least one trench capacitor is connected to a pad.
8 . The semiconductor device according to claim 7 , wherein the second hybrid bond pad is electrically connected to the pad through a power supply line.
9 . A semiconductor device, comprising:
an application processor (AP) die; and
a memory die directly bonded to the AP die, wherein the memory die comprises a substrate, a non-volatile memory structure on the substrate, and at least one trench capacitor in the substrate, wherein a first hybrid bond pad and a second hybrid bond pad are disposed on an upper surface of the memory die, wherein the first and second hybrid bond pads are directly bonded to third and fourth hybrid bond pads on the AP die, respectively, through hybrid bonding.
10 . The semiconductor device according to claim 9 , wherein the first hybrid bond pad, the second hybrid bond pad, the third hybrid bond pad, and the fourth hybrid bond pad are copper pads.