Etch profile control of gate contact opening
A device comprises source/drain epitaxial structures over a substrate; source/drain contacts over the source/drain epitaxial structures, respectively; a gate structure laterally between the source/drain contacts; a gate dielectric cap over the gate structure and having a bottom surface below top surfaces of the source/drain contacts; an oxide-based etch-resistant layer over the gate dielectric cap; a nitride-based etch stop layer over the oxide-based etch-resistant layer; an interlayer dielectric (ILD) layer over the nitride-based etch stop layer; and a gate contact extending through the ILD layer, the nitride-based etch stop layer, the oxide-based etch-resistant layer, and the gate dielectric cap to electrically connect with the gate structure.
1 . A device, comprising:
source/drain epitaxial structures over a substrate;
source/drain contacts over the source/drain epitaxial structures, respectively;
a first gate structure laterally between the source/drain contacts;
a second gate structure disposed laterally beyond a region between the source/drain contacts
a gate dielectric cap over the first gate structure and having a bottom surface below top surfaces of the source/drain contacts;
an oxide-based etch-resistant layer over the gate dielectric cap, wherein the oxide-based etch-resistant layer has a bottom surface forming an interface with a top surface of one of the source/drain contacts;
a nitride-based etch stop layer over the oxide-based etch-resistant layer;
an interlayer dielectric (ILD) layer over the nitride-based etch stop layer;
a first gate contact extending through the ILD layer, the nitride-based etch stop layer, the oxide-based etch-resistant layer, and the gate dielectric cap to electrically connect with the first gate structure; and
a second gate contact over the second gate structure, wherein a width at a top surface of the second gate contact is greater than a width at a top surface of the first gate contact.
2 . The device of claim 1 , wherein the oxide-based etch-resistant layer is thinner than the nitride-based etch stop layer.
3 . The device of claim 1 , wherein the oxide-based etch-resistant layer is thinner than the gate dielectric cap.
4 . The device of claim 1 , wherein the oxide-based etch-resistant layer is further over the source/drain contacts.
5 . The device of claim 1 , wherein an interface between the oxide-based etch-resistant layer and the gate dielectric cap is aligned with an interface between the oxide-based etch-resistant layer and one of the source/drain contacts.
6 . The device of claim 1 , wherein the oxide-based etch-resistant layer is spaced apart from the first gate structure by the gate dielectric cap.
7 . The device of claim 1 , further comprising:
a metal cap interposing the first gate contact and the first gate structure.
8 . The device of claim 7 , wherein the metal cap comprises fluorine-free tungsten.
9 . The device of claim 1 , further comprising:
gate spacers spacing apart the first gate structure from the source/drain contacts.
10 . The device of claim 9 , wherein the gate spacers are spaced apart from the oxide-based etch-resistant layer by the gate dielectric cap.
11 . The device of claim 1 , wherein a sidewall of the first gate contact has a slope change, along a direction toward the first gate structure, from a vertical shape to a tapered shape at an interface formed by the gate dielectric cap and the oxide-based etch-resistant layer.
12 . A device, comprising:
a first gate structure and a second gate structure over a substrate;
source/drain regions at opposite sides of the first gate structure;
source/drain contacts over the source/drain regions, respectively;
a gate dielectric cap over the first gate structure and having opposite sidewalls interfacing the source/drain contacts;
an etch-resistant layer over the gate dielectric cap, wherein a bottom surface of the etch-resistant layer is in contact with a top surface of one of the source/drain contacts;
an etch stop layer over the etch-resistant layer, the etch stop layer having a thickness greater than a thickness of the etch-resistant layer;
an interlayer dielectric (ILD) layer over the etch stop layer;
a first gate contact over the first gate structure, the first gate contact extending through the ILD layer, the etch stop layer, and the etch-resistant layer to electrically connect with the first gate structure, wherein a sidewall of the first gate contact has a slope change, along a downward direction, from a vertical shape to a tapered shape at an interface formed by the etch-resistant layer and the gate dielectric cap; and
a second gate contact over the second gate structure, wherein a width at a top surface of the second gate contact is greater than a width at a top surface of the first gate contact.
13 . The device of claim 12 , wherein the thickness of the etch-resistant layer is less than a thickness of the gate dielectric cap.
14 . The device of claim 12 , wherein the etch-resistant layer continuously extends across the source/drain contacts.
15 . A device, comprising:
a first channel region and a second channel region over a substrate;
a first gate structure over the first channel region;
a second gate structure over the second channel region;
a first dielectric cap over the first gate structure;
a second dielectric cap over the second gate structure;
a nitride-based etch stop layer over the first dielectric cap and the second dielectric cap;
an oxide-based etch-resistant layer spacing apart the nitride-based etch stop layer from the first dielectric cap and the second dielectric cap;
a first gate contact over the first gate structure, the first gate contact extending through the nitride-based etch stop layer, the oxide-based etch-resistant layer, and the first dielectric cap;
a second gate contact over the second gate structure, the second gate contact extending through the nitride-based etch stop layer, the oxide-based etch-resistant layer, and the second dielectric cap, wherein a width difference between the first and second gate contact is greater than a width difference between the first and second gate structures, wherein a width at a top surface of the second gate contact is greater than a width at a top surface of the first gate contact;
source/drain regions at opposite sides of the first gate structure; and
source/drain contact over the source/drain regions, respectively, wherein a top surface of the source/drain contact is in contact with a bottom surface of the oxide-based etch-resistant layer.
16 . The device of claim 15 , wherein the first gate contact has a bottom surface entirely overlapping the first gate structure.
17 . The device of claim 16 , wherein the second gate contact has a bottom surface partially overlapping the second gate structure.
18 . The device of claim 15 , further comprising:
first gate spacers on either side of the first gate structure, wherein the first gate contact has a bottom surface non-overlapping the first gate spacers.
19 . The device of claim 18 , further comprising:
second gate spacers on either side of the second gate structure, wherein the second gate contact has a bottom surface partially overlapping one of the second gate spacers.
20 . The device of claim 15 , wherein an interface formed by the first gate contact and the oxide-based etch-resistant layer is more vertical than an interface formed by the first gate contact and the first dielectric cap.