IP Library Assignment 023806/0393
Patent Assignment
Reel/Frame 023806/0393

Assignment of Assignor's Interest

Recorded: 2010-01-14 Pages: 386
Assignor
Assignee
QIMONDA AG
GUSTAV-HEINEMANN-RING 212, MUNICH, 81739, GERMANY
Covered Properties (26)
Security Memory Card and Production Method
Patent: 7,121,473 →
Application: 10/769,286 →
Publication: US 2004/0211843
Integrated Circuit with a Control Input That Can Be Disabled
Patent: 7,409,609 →
Application: 11/079,889 →
Publication: US 2006/0212765
Method for Operating a Flash Memory Device
Patent: 7,158,416 →
Application: 11/081,085 →
Publication: US 2006/0209609
Non-Volatile Memory Card with Autarkic Chronometer
Patent: 7,410,102 →
Application: 11/081,086 →
Publication: US 2006/0208092
Non-Volatile Semiconductor Memory and Method for Writing Data into a Non-Volatile Semiconductor Memory
Patent: 7,187,589 →
Application: 11/127,022 →
Publication: US 2006/0256621
Method and Apparatus for Adapting Circuit Components of a Memory Module to Changing Operating Conditions
Patent: 7,548,477 →
Application: 11/135,611 →
Publication: US 2006/0262591
Method of Programming of a Non-Volatile Memory Cell Comprising Steps of Applying Constant Voltage and Then Constant Current
Patent: 7,274,597 →
Application: 11/141,255 →
Publication: US 2006/0268611
Memory Device and Method for Operating the Memory Device
Patent: 7,283,395 →
Application: 11/166,788 →
Publication: US 2006/0291301
Method and Apparatus for Sensing a State of a Memory Cell
Patent: 7,203,096 →
Application: 11/172,367 →
Publication: US 2007/0002654
Non-Volatile Memory Cell Device, Programming Element and Method for Programming Data into a Plurality of Non-Volatile Memory Cells
Patent: 7,242,623 →
Application: 11/179,345 →
Publication: US 2007/0016720
Column Redundancy Reuse in Memory Devices
Patent: 7,355,909 →
Application: 11/179,358 →
Publication: US 2007/0014165
Non-Volatile Semiconductor Memory
Patent: 7,167,395 →
Application: 11/181,387 →
Publication: US 2007/0014160
Semiconductor Package Based on Lead-on-Chip Architecture, the Fabrication Thereof and a Leadframe for Implementing in a Semiconductor Package
Patent: 7,348,660 →
Application: 11/192,981 →
Publication: US 2007/0023871
Non-Volatile Semiconductor Memory and Method for Reading a Memory Cell
Patent: 7,233,514 →
Application: 11/200,504 →
Publication: US 2007/0035992
Semiconductor Memory Device and Method for Writing Data into the Semiconductor Memory Device
Patent: 7,295,477 →
Application: 11/229,003 →
Publication: US 2007/0064499
Semiconductor Memory and Method for Operating a Semiconductor Memory Comprising a Plurality of Memory Cells
Patent: 7,190,605 →
Application: 11/240,659 →
Publication: US 2007/0076462
Memory Device and Method for Operating a Memory Device
Patent: 7,342,829 →
Application: 11/241,817 →
Publication: US 2007/0076464
Non-Volatile Semiconductor Memory Device and Method for Operating a Non-Volatile Memory Device
Patent: 7,403,417 →
Application: 11/287,462 →
Publication: US 2007/0115720
Semiconductor Memory Device Having a Redundancy Information Memory Directly Connected to a Redundancy Control Circuit
Patent: 7,411,844 →
Application: 11/291,081 →
Publication: US 2007/0121396
Processing Arrangement, Memory Card Device and Method for Operating and Manufacturing a Processing Arrangement
Patent: 7,502,916 →
Application: 11/292,948 →
Publication: US 2007/0130449
Method for Programming a Block of Memory Cells, Non-Volatile Memory Device and Memory Card Device
Patent: 7,564,718 →
Application: 11/402,649 →
Publication: US 2007/0242518
Integrated Memory Device and Method for Its Testing and Manufacture
Patent: 7,434,121 →
Application: 11/443,493 →
Publication: US 2007/0300106
Voltage Generator Circuit, Method for Providing an Output Voltage and Electronic Memory Device
Patent: 7,355,468 →
Application: 11/473,519 →
Publication: US 2007/0296486
Memory Array Architecture and Method for High-Speed Distribution Measurements
Patent: 7,403,438 →
Application: 11/485,185 →
Publication: US 2008/0013390
Device with Memory and Method of Operating Device
Patent: 7,660,142 →
Application: 11/541,393 →
Publication: US 2008/0091753
Memory Device Architecture and Method for Improved Bitline Pre-Charge and Wordline Timing
Patent: 7,522,461 →
Application: 11/593,444 →
Publication: US 2008/0106960
Related Assignments (4)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest May 8, 2015
From: QIMONDA AG
To: INFINEON TECHNOLOGIES AG
Reel/Frame 035623/0001 →
Assignment of Assignor's Interest Sep 28, 2015
From: INFINEON TECHNOLOGIES AG
To: POLARIS INNOVATIONS LIMITED
Reel/Frame 036701/0926 →
Assignment of Assignor's Interest Oct 15, 2015
From: INFINEON TECHNOLOGIES AG
To: POLARIS INNOVATIONS LIMITED
Reel/Frame 036873/0758 →
Assignment of Assignor's Interest Oct 21, 2015
From: INFINEON TECHNOLOGIES AG
To: POLARIS INNOVATIONS LIMITED
Reel/Frame 036908/0923 →