IP Library › Assignment 030740/0481
Patent Assignment
Reel/Frame 030740/0481

Assignment of Assignor's Interest

Recorded: 2013-07-03 Pages: 226
Assignor
Assignee
MICRON TECHNOLOGY, INC.
8000 SO. FEDERAL WAY, BOISE, IDAHO, 83716-9632
Covered Properties (77)
Redundancy Element Check in Ic Memory Without Programming Substitution of Redundant Elements
Patent: 5,404,331 →
Application: 08/099,606 →
Disabling Sense Amplifier
Patent: 5,377,150 →
Application: 08/099,947 →
Distributed nor Tag Match Apparatus
Patent: 5,572,456 →
Application: 08/114,747 →
Precharge Device for an Integrated Circuit Internal Bus
Patent: 5,402,379 →
Application: 08/114,749 →
Latch Controlled Output Driver
Patent: 5,396,108 →
Application: 08/129,257 →
Edge Transition Detection Disable Circuit to Alter Memory Device Operating Characteristics
Patent: 5,418,756 →
Application: 08/129,763 →
Static Test Mode Noise Filter
Patent: 5,440,178 →
Application: 08/160,608 →
Method and Device for Acquiring Redundancy Information from a Packaged Memory Chip
Patent: 6,101,618 →
Application: 08/172,848 →
Data Comparing Sense Amplifier
Patent: 5,568,073 →
Application: 08/172,853 →
Stress Test Mode
Patent: 5,835,427 →
Application: 08/172,854 →
Static Memory Long Write Test
Patent: 5,577,051 →
Application: 08/173,197 →
Method and Apparatus for Programming Signal Timing
Patent: 5,579,326 →
Application: 08/189,589 →
Integrated Circuit with Fuse Circuitry Simulating Fuse Blowing
Patent: 5,517,455 →
Application: 08/220,976 →
Structure Capable of Simultaneously Testing Redundant and Non-Redundant Memory Elements During Stress Testing of an Integrated Circuit Memory Device
Patent: 5,530,674 →
Application: 08/235,161 →
Circuit Which Provides Power on Reset Disable During a Test Mode
Patent: 5,455,799 →
Application: 08/267,666 →
Long Write Test
Patent: 5,583,816 →
Application: 08/267,667 →
Test Mode Control Circuit of an Integrated Circuit Device
Patent: 5,982,188 →
Application: 08/282,047 →
Variable Input Threshold Adjustment
Patent: 5,589,783 →
Application: 08/282,177 →
Apparatus and Method for Enabling a Bus Driver When a Data Signal Is Valid
Patent: 5,566,112 →
Application: 08/288,334 →
Full Memory Chip Long Write Test Mode
Patent: 5,502,678 →
Application: 08/315,337 →
Pre-Charged Exclusionary Wired-Connected Programmed Redundant Select
Patent: 5,495,446 →
Application: 08/316,087 →
Circuit Structure and Method for Stress Testing of Bit Lines
Patent: 5,610,866 →
Application: 08/331,699 →
Low Current Differential Level Shifter
Patent: 5,517,148 →
Application: 08/331,892 →
Circuit for Providing a Compensated Bias Voltage
Patent: 5,568,084 →
Application: 08/357,664 →
Output Driver Circuitry with Selective Limited Output High Voltage
Patent: 5,594,373 →
Application: 08/359,397 →
Voltage Reference Circuit Having a Threshold Voltage Shift
Patent: 5,598,122 →
Application: 08/359,926 →
Adjustable Current Source
Patent: 5,581,209 →
Application: 08/359,927 →
Dynamically Controlled Voltage Reference Circuit
Patent: 5,589,794 →
Application: 08/360,227 →
Output Driver Circuitry with Limited Output High Voltage
Patent: 5,596,297 →
Application: 08/360,228 →
Voltage Reference Circuit Using an Offset Compensating Current Source
Patent: 5,548,241 →
Application: 08/360,229 →
Post-Fabrication Selectable Registered and Non-Registered Memory
Patent: 5,579,263 →
Application: 08/362,187 →
Voltage Regulator for an Output Driver with Reduced Output Impedance
Patent: 5,576,656 →
Application: 08/414,103 →
Apparatus and Method for Mapping a Redundant Memory Column to a Defective Memory Column
Patent: 5,572,470 →
Application: 08/438,349 →
Apparatus and Method for Mapping a Redundant Memory Column to a Defective Memory Column
Patent: 5,574,688 →
Application: 08/438,903 →
Circuit for Providing a Bias Voltage Compensated for P-Channel Transistor Variations
Patent: 5,640,122 →
Application: 08/464,551 →
Circuit and Method for Biasing Bit Lines
Patent: 5,768,206 →
Application: 08/484,491 →
Structure for Deselecting Broken Select Lines in Memory Arrays
Patent: 5,648,933 →
Application: 08/509,211 →
Column Redundancy of a Multiple Block Memory Architecture
Patent: 5,608,678 →
Application: 08/509,351 →
Circuitry and Methodology to Test Single Bit Failures of Integrated Circuit Memory Devices
Patent: 5,633,828 →
Application: 08/519,075 →
Write Controlled Address Buffer
Patent: 5,629,896 →
Application: 08/521,800 →
Test Mode Activation and Data Override
Patent: 6,144,594 →
Application: 08/587,709 →
Circuit and Method for Setting the Time Duration of a Write to a Memory Cell
Patent: 5,864,696 →
Application: 08/587,711 →
Clocked Sense Amplifier with Wordline Tracking
Patent: 5,802,004 →
Application: 08/587,728 →
Switching Master Slave Circuit
Patent: 5,783,958 →
Application: 08/588,648 →
Write Pass Through Circuit
Patent: 5,657,292 →
Application: 08/588,662 →
Pipelined Chip Enable Control Circuitry and Methodology
Patent: 5,701,275 →
Application: 08/588,730 →
Data-Input Device for Generating Test Signals on Bit and Bit-Complement Lines
Patent: 5,845,059 →
Application: 08/588,762 →
Output Driver Circuitry Having a Single Slew Rate Resistor
Patent: 5,801,563 →
Application: 08/588,988 →
Low-Power Read Circuit and Method for Controlling a Sense Amplifier
Patent: 5,619,466 →
Application: 08/589,024 →
Write Driver Having a Test Function
Patent: 5,745,432 →
Application: 08/589,141 →
Integrated Circuit That Supports and Method for Wafer-Level Testing
Patent: 5,808,947 →
Application: 08/710,357 →
Circuit and Method for Selecting a Signal
Patent: 6,037,799 →
Application: 08/758,587 →
External Write Pulse Control Method and Structure
Patent: 5,764,592 →
Application: 08/771,642 →
Sense Amplifier Control of a Memory Device
Patent: 5,959,910 →
Application: 08/844,696 →
Structure for Deselective Broken Select Lines in Memory Arrays
Patent: 36,319 →
Application: 08/966,042 →
Circuit and Method for Reading a Memory Cell
Patent: 5,995,421 →
Application: 09/087,399 →
Method and Structure for Enhancing the Access Time of Integrated Circuit Memory Devices
Patent: 5,946,264 →
Application: 09/183,231 →
Stress Test Mode Entry at Power Up for Low/Zero Power Memories
Patent: 6,081,466 →
Application: 09/183,451 →
Control Circuit for Terminating a Memory Access Cycle in a Memory Block of an Electronic Storage Device
Patent: 6,034,917 →
Application: 09/183,589 →
Initialization for Fuse Control
Patent: 6,041,000 →
Application: 09/183,840 →
Pipelined Non-Blocking Level Two Cache System with Inherent Transaction Collision-Avoidance
Patent: 6,519,682 →
Application: 09/205,598 →
Publication: US 2002/0069326
Apparatus and Method for Switching Between Two Power Supplies of an Integrated Circuit
Patent: 6,118,188 →
Application: 09/217,321 →
Method and Apparatus for Increasing Comparator Gain Without Affecting Standby Current
Patent: 6,084,390 →
Application: 09/217,323 →
Communications System and Method for Reducing the Effects of Transmitter Non-Linear Distortion on a Received Signal
Patent: 6,434,189 →
Application: 09/335,024 →
Reference Voltage Asjustment
Patent: 6,281,734 →
Application: 09/476,036 →
Power Supply Switch Reference Circuitry
Patent: 37,876 →
Application: 09/568,201 →
Integrated Volatile and Non-Volatile Memory
Patent: 6,594,192 →
Application: 09/653,495 →
Content Addressable Memory (Cam) with Battery Back-Up
Patent: 6,496,439 →
Application: 09/895,491 →
Publication: US 2003/0002314
Dual Bank Flash Memory Device and Method
Patent: 6,552,935 →
Application: 09/922,044 →
Publication: US 2003/0026130
Redundancy Circuit and Method for Flash Memory Devices
Patent: 6,563,732 →
Application: 09/922,068 →
Publication: US 2003/0026129
Single Ended Output Sense Amplifier Circuit with Reduced Power Consumption and Noise
Patent: 6,822,919 →
Application: 10/190,917 →
Publication: US 2004/0004881
Tamper Memory Cell
Patent: 7,224,600 →
Application: 10/783,935 →
Publication: US 2005/0152177
User Ram Flash Clear
Patent: 7,173,845 →
Application: 10/788,581 →
Publication: US 2004/0223362
Reset Initialization
Patent: 7,208,987 →
Application: 10/999,751 →
Publication: US 2005/0134345
Voltage Translating Control Structure
Patent: 7,368,947 →
Application: 11/012,533 →
Publication: US 2005/0134356
Reset Circuit
Patent: 7,276,948 →
Application: 11/012,712 →
Publication: US 2005/0134334
Esd Bonding Pad
Patent: 7,333,310 →
Application: 11/013,123 →
Publication: US 2005/0134240
Related Assignments (25)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Jul 30, 1993
From: MCCLURE, DAVID C.
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 006645/0395 →
Assignment of Assignor's Interest Jul 30, 1993
From: MCCLURE, DAVID CHARLES
To: SGS-THOMSOM MICROELECTRONICS, INC.
Reel/Frame 006666/0209 →
Assignment of Assignor's Interest Aug 31, 1993
From: MCCLURE, DAVID CHARLES
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 006707/0888 →
Assignment of Assignor's Interest Aug 31, 1993
From: MCCLURE, DAVID C.
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 006684/0754 →
Assignment of Assignor's Interest Sep 30, 1993
From: MCCLURE, DAVID C.
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 006724/0702 →
Assignment of Assignor's Interest Sep 30, 1993
From: MCCLURE, DAVID C.
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 006716/0956 →
Assignment of Assignor's Interest Nov 30, 1993
From: MCCLURE, DAVID CHARLES
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 006799/0126 →
Assignment of Assignor's Interest Dec 22, 1993
From: MCCLURE, DAVID C.
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 006840/0601 →
Assignment of Assignor's Interest Dec 22, 1993
From: MCCLURE, DAVID CHARLES
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 006820/0828 →
Assignment of Assignor's Interest Dec 22, 1993
From: MCCLURE, DAVID C.
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 006824/0614 →
Assignment of Assignor's Interest Dec 22, 1993
From: MCCLURE, DAVID C.
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 006828/0888 →
Assignment of Assignor's Interest Jan 31, 1994
From: MCCLURE,DAVID C.
To: SGS-THOMSON MICROELECTRONICS,INC.
Reel/Frame 006864/0640 →
Assignment of Assignor's Interest Mar 31, 1994
From: MCCLURE, DAVID CHARLES; SLEMMER, WILLIAM CARL
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 007002/0008 →
Assignment of Assignor's Interest Apr 29, 1994
From: MCCLURE, DAVID CHARLES; TEEL, THOMAS AUSTIN
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 006995/0881 →
Assignment of Assignor's Interest Jun 29, 1994
From: MCCLURE, DAVID CHARLES; TEEL, THOMAS AUSTIN
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 007060/0302 →
Assignment of Assignor's Interest Jun 29, 1994
From: MCCLURE, DAVID CHARLES
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 007060/0049 →
Assignment of Assignor's Interest Jul 29, 1994
From: LYSINGER, MARK ALAN
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 007088/0717 →
Assignment of Assignor's Interest Jul 29, 1994
From: MCCLURE, DAVID CHARLES
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 007100/0698 →
Assignment of Assignor's Interest Aug 10, 1994
From: LYSINGER, MARK A.
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 007106/0620 →
Assignment of Assignor's Interest Sep 30, 1994
From: TEEL, THOMAS AUSTIN; MCCLURE, DAVID CHARLES
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 007168/0961 →
Assignment of Assignor's Interest Sep 30, 1994
From: MCCLURE, DAVID CHARLES
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 007172/0758 →
Assignment of Assignor's Interest Oct 31, 1994
From: YIN, RONG
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 007253/0534 →
Assignment of Assignor's Interest Oct 31, 1994
From: MCCLURE, DAVID C.
To: SGS-THOMSON MICROELECTRINCS, INC.
Reel/Frame 007225/0879 →
Assignment of Assignor's Interest Dec 16, 1994
From: MCCLURE, DAVID CHARLES; TEEL, THOMAS A.
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 007294/0891 →
Assignment of Assignor's Interest Dec 20, 1994
From: MCCLURE, DAVID CHARLES
To: SGS-THOMSON MICROELECTRONICS, INC.
Reel/Frame 007294/0971 →