Patent Assignment
Reel/Frame 039461/0418
Order. . . Authorizing the Sale of All or Substantially All of the Assets of the Debtors Free and Clear of All Liens, Claims, Encumbrances, and Interests.
Recorded: 2016-07-25
Pages: 81
Assignor
WELLS FARGO FOOTHILL CAPITAL, INC.
Executed: 2009-04-30
Assignee
SILICON GRAPHICS INC.
1140 EAST ARQUES AVE, SUNNYVALE, CALIFORNIA, 94085
Covered Properties
(74)
Packet Switched Router Architecture for Providing Multiple Simultaneous Communications
Patent:
6,683,876 →
Application:
08/717,580 →
Guaranteeing Completion Times for Batch Jobs Without Static Partitioning
Patent:
6,353,844 →
Application:
08/773,486 →
Distributed Scheduling of Parallel Jobs with No Kernel-to-Kernel Communication
Patent:
6,766,515 →
Application:
08/801,646 →
System and Method for Finding Preempted Threads in a Multi-Threaded Application
Patent:
6,418,460 →
Application:
08/802,802 →
Latching Assembly for a Computer
Patent:
5,907,962 →
Application:
08/966,611 →
Method and Apparatus for Processing a Set of Data Values with Plural Processing Units Using Mask Bits Generated by Other Processing Units
Patent:
6,308,250 →
Application:
09/103,201 →
Large Area Wide Aspect Ratio Flat Panel Monitor Having High Resolution for High Information Content Display
Patent:
6,816,145 →
Application:
09/120,983 →
Advanced Firmware Boot Sequence X86 Computer System That Maintains Legacy Hardware and Software Compatibility
Patent:
6,357,003 →
Application:
09/176,694 →
Method for Managing Concurrent Access to Virtual Memory Data Structures
Patent:
6,496,909 →
Application:
09/287,592 →
System and Method for Providing Access to a Bus
Patent:
7,197,589 →
Application:
09/315,806 →
Circuit Design for High-Speed Digital Communication
Patent:
6,775,339 →
Application:
09/384,906 →
Determining a Worst Case Switching Factor for Integrated Circuit Design
Patent:
6,353,917 →
Application:
09/387,934 →
Electrically Conductive Path Through a Dielectric Material
Input/Output Device Managed Timer Process
Patent:
6,594,787 →
Application:
09/399,437 →
Transfer Attribute Encoding Within Pci Constructed Address to Indicate Whether Bytes Within a Word Should Be Swapped
Patent:
6,711,636 →
Application:
09/407,421 →
Multiprocessor Node Controller Circuit and Method
Patent:
6,751,698 →
Application:
09/407,428 →
Computer Module Mounting System and Method
Patent:
6,452,805 →
Application:
09/408,148 →
Method and Assembly for Installation or Removal of Printed Circuit Card
Patent:
6,496,385 →
Application:
09/408,657 →
Age-Based Network Arbitration System and Method
Patent:
6,674,720 →
Application:
09/408,778 →
Scalable Hypercube Multiprocessor Network for Massive Parallel Processing
Patent:
6,973,559 →
Application:
09/408,972 →
Modular Input/Output Controller Capable of Routing Packets Over Busses Operating at Different Speeds
Patent:
6,553,446 →
Application:
09/409,299 →
System and Method for Minimizing Error Correction Code Bits in Variable Sized Data Formats
Patent:
6,487,685 →
Application:
09/409,607 →
Method and Apparatus for Processing Errors in a Computer System
Patent:
6,457,146 →
Application:
09/409,764 →
Method and Apparatus for Analyzing Buffer Allocation to a Device on a Peripheral Component Interconnect Bus
Patent:
6,397,274 →
Application:
09/409,765 →
Method and System for Handling Interrupts in a Node Controller Without Attached Processors
Patent:
6,564,277 →
Application:
09/409,766 →
Data Synchronizer for a Multiple Rate Clock Source and Method Thereof
Patent:
6,529,570 →
Application:
09/409,768 →
Method and Apparatus for Handling Invalidation Requests to Processors Not Present in a Computer System
Patent:
6,339,812 →
Application:
09/410,139 →
Exchanging Messages Between Computer Systems Communicatively Coupled in a Computer System Network
Patent:
6,766,358 →
Application:
09/427,203 →
Synchronization of Hardware Simulation Processes
Patent:
6,879,948 →
Application:
09/459,995 →
Method and System for Clock Cycle Measurement and Delay Offset
Patent:
6,680,636 →
Application:
09/541,068 →
Housing Ground Bracket and Method
Patent:
6,574,121 →
Application:
09/548,497 →
Electrical Connector with Latching Backplate Assembly
Patent:
6,293,813 →
Application:
09/608,935 →
System, Method and Computer Program Product for Implementing Scalable Multi-Reader/Single-Writer Locks
Patent:
6,601,120 →
Application:
09/615,312 →
I/O Impedance Controller
Patent:
6,703,908 →
Application:
09/619,724 →
Method and Apparatus for Prefetching Information and Storing the Information in a Stream Buffer
Patent:
6,901,500 →
Application:
09/627,471 →
Method for Displaying Three-Dimensional Objects and a Computer-Readable Storage Medium Storing a Program for Achieving the Same
Patent:
6,683,607 →
Application:
09/636,098 →
Method and System for Calculating Interconnect Moments and Delay
Patent:
6,532,575 →
Application:
09/660,732 →
System and Method for Maintaining and Recovering Data Consistency Across Multiple Pages
Patent:
6,721,739 →
Application:
09/730,871 →
Packetized Data Transmissions in a Switched Router Architecture
Patent:
6,985,484 →
Application:
09/896,370 →
Memory Device Storing Data and Directory Information Thereon, and Method for Providing the Directory Information and the Data in the Memory Device
System and Method for Removing Data from Processor Caches in a Distributed Multi-Processor Computer System
Patent:
8,635,410 →
Application:
09/909,700 →
System and Method for Reducing Memory Latency During Read Requests
Patent:
6,678,798 →
Application:
09/909,701 →
Queue Circuit and Method for Memory Arbitration Employing Same
Patent:
7,406,554 →
Application:
09/909,704 →
System and Method for Memory Arbitration
Patent:
6,816,947 →
Application:
09/909,705 →
Method and System for Using High Count Invalidate Acknowledgements in Distributed Shared Memory Systems
Patent:
6,718,442 →
Application:
09/910,274 →
Method and System for Controlling Data Access Between at Least Two Memory Arrangements
Patent:
6,839,820 →
Application:
09/910,395 →
Method and System for Maintaining Data at Input/Output (I/O) Interfaces for a Multiprocessor System
Patent:
6,981,101 →
Application:
09/910,531 →
Method and System for Covering Multiple Resources with a Single Credit in a Computer System
Patent:
7,007,097 →
Application:
09/910,584 →
Providing Shared and Non-Shared Access to Memory in a System with Plural Processor Coherence Domains
Patent:
7,069,306 →
Application:
09/910,591 →
Method and Apparatus for Managing Node Controllers Using Partitions in a Computer System
Patent:
6,877,029 →
Application:
09/910,629 →
Method and System for Efficient Use of a Multi-Dimensional Sharing Vector in a Computer System
Patent:
6,915,388 →
Application:
09/910,630 →
Method and Apparatus for Handling Invalidation Requests to Processors Not Present in a Computer System
Method and System for Cache Coherence in Dsm Multiprocessor System Without Growth of the Sharing Vector
System and Method for Repairing a Memory Column
Patent:
6,724,669 →
Application:
10/142,822 →
Clustered Filesystem
System and Method for Conveying Information
Patent:
7,712,006 →
Application:
10/310,237 →
System and Method for Conveying Information
Patent:
7,447,794 →
Application:
10/310,400 →
Recovery and Relocation of a Distributed Name Service in a Cluster Filesystem
Global Pointers for Scalable Parallel Applications
Multi-Class Heterogeneous Clients in a Clustered Filesystem
Clustered Filesystem for Mix of Trusted and Untrusted Nodes
Messaging Between Heterogeneous Clients of a Storage Area Network
System, Method, and Computer Program Product for Applying Different Transport Mechanisms for User Interface and Image Portions of a Remotely Rendered Image
Real-Time Storage Area Network
Relocation of Metadata Server with Outstanding Dmapi Requests
Network filesystem asynchronous I/O scheduling
Detection and Control of Resource Congestion by a Number of Processors
System and Method for Reducing Memory Latency During Read Requests
Patent:
6,938,128 →
Application:
10/725,897 →
System and Method for Performing Address Translation in a Computer System
System and Method for Performing Memory Operations in a Computing System
Patent:
7,398,359 →
Application:
10/836,932 →
Multiprocessor Node Controller Circuit and Method
Method for Empirically Determining a Qualified Bandwidth of File Storage for a Shared Filed System
Server Product Faceplate
Patent:
464,056 →
Application:
29/146,729 →
Set of Multi Device Faceplates
Patent:
473,561 →
Application:
29/148,943 →
Related Assignments
(22)
Other recorded transfers of the patents in this record — the chain of ownership.
Merger
Apr 16, 2014
From: SGI INTERNATIONAL, INC.
To: SILICON GRAPHICS INTERNATIONAL CORP.
Reel/Frame 032692/0663 →
Assignment of Assignor's Interest
Apr 16, 2014
From: SILICON GRAPHICS, INC.
To: SILICON GRAPHICS INTERNATIONAL, INC.
Reel/Frame 032692/0491 →
Change of Name
Apr 16, 2014
From: SILICON GRAPHICS INTERNATIONAL, INC.
To: SGI INTERNATIONAL, INC.
Reel/Frame 032706/0679 →
Assignment of Assignor's Interest
Apr 18, 2014
From: SILICON GRAPHICS, INC.
To: SILICON GRAPHICS INTERNATIONAL, INC.
Reel/Frame 032714/0032 →
Merger
Apr 18, 2014
From: SGI INTERNATIONAL, INC.
To: SILICON GRAPHICS INTERNATIONAL CORP.
Reel/Frame 032714/0427 →
Change of Name
Apr 18, 2014
From: SILICON GRAPHICS INTERNATIONAL, INC.
To: SGI INTERNATIONAL, INC.
Reel/Frame 032714/0230 →
Order...Authorizing the Sale of All or Substantially All of the Assets of the Debtors Free and Clear of All Liens, Claims, Encumbrances, and Interests...
Apr 24, 2014
From: WELLS FARGO FOOTHILL CAPITAL, INC.
To: SILICON GRAPHICS, INC.
Reel/Frame 032758/0418 →
Order...Authorizing the Sale of All or Substantially All of the Assets of the Debtors Free and Clear of All Liens, Claims, Encumbrances, and Interests...
Apr 24, 2014
From: MORGAN STANLEY & CO., INCORPORATED
To: SILICON GRAPHICS, INC.
Reel/Frame 032757/0847 →
Merger
Jan 22, 2015
From: SGI INTERNATIONAL, INC.
To: SILICON GRAPHICS INTERNATIONAL CORP.
Reel/Frame 034804/0437 →
Assignment of Assignor's Interest
Jan 22, 2015
From: SILICON GRAPHICS, INC.
To: SILICON GRAPHICS INTERNATIONAL, INC.
Reel/Frame 034804/0446 →
Change of Name
Jan 22, 2015
From: SILICON GRAPHICS INTERNATIONAL, INC.
To: SGI INTERNATIONAL, INC.
Reel/Frame 034804/0661 →
Change of Name
Jan 27, 2015
From: SILICON GRAPHICS INTERNATIONAL, INC.
To: SGI INTERNATIONAL, INC.
Reel/Frame 034826/0576 →
Assignment of Assignor's Interest
Jan 27, 2015
From: SILICON GRAPHICS, INC.
To: SILICON GRAPHICS INTERNATIONAL, INC.
Reel/Frame 034822/0483 →
Merger
Jan 27, 2015
From: SGI INTERNATIONAL, INC.
To: SILICON GRAPHICS INTERNATIONAL CORP.
Reel/Frame 034823/0090 →
Merger
Jan 28, 2015
From: CRAY RESEARCH, INC.
To: CRAY RESEARCH, L.L.C.
Reel/Frame 034837/0218 →
Security Interest
Mar 13, 2015
From: SILICON GRAPHICS INTERNATIONAL CORP.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035200/0722 →
Assignment of Assignor's Interest
Oct 20, 2015
From: GRAPHICS PROPERTIES HOLDINGS, INC.
To: RPX CORPORATION
Reel/Frame 036901/0951 →
Order. . .Authorizing the Sale of All or Substantially All of the Assets of the Debtors Free and Clear of All Liens, Claims, Encumbrances, and Interests.
Jul 25, 2016
From: MORGAN STANLEY & CO., INCORPORATED
To: SILICON GRAPHICS, INC.
Reel/Frame 039461/0713 →
Order...Authorizing the Sale of All or Substantially All of the Assets of the Debtors Free and Clear of All Liens, Encumbrances, and Interests.
Jul 28, 2016
From: WELLS FARGO FOOTHILL CAPITAL, INC.
To: SILICON GRAPHICS INC.
Reel/Frame 039503/0149 →
Order...Authorizing the Sale of All or Substantially All of the Assets of the Debtors Free and Clear of All Liens, Encumbrances, and Interests.
Jul 28, 2016
From: MORGAN STANLEY & CO., INCORPORATED
To: SILICON GRAPHICS, INC.
Reel/Frame 039503/0247 →
Release of Security Interest
Nov 2, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS AGENT
To: SILICON GRAPHICS INTERNATIONAL CORP.
Reel/Frame 040545/0362 →
Assignment of Assignor's Interest
Oct 4, 2017
From: SILICON GRAPHICS INTERNATIONAL CORP.
To: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Reel/Frame 044128/0149 →