Patent Assignment
Reel/Frame 039461/0713
Order. . .Authorizing the Sale of All or Substantially All of the Assets of the Debtors Free and Clear of All Liens, Claims, Encumbrances, and Interests.
Recorded: 2016-07-25
Pages: 8
Assignor
MORGAN STANLEY & CO., INCORPORATED
Executed: 2009-05-08
Assignee
SILICON GRAPHICS, INC.
1140 EAST ARQUES AVE., SUNNYVALE, CALIFORNIA, 94085
Covered Properties
(84)
System and Method for Multiprocessor Partitioning to Support High Availability
Patent:
5,991,895 →
Application:
08/435,462 →
Packet Switched Router Architecture for Providing Multiple Simultaneous Communications
Patent:
6,683,876 →
Application:
08/717,580 →
Packetized Data Transmissions in a Switched Router Architecture
Patent:
6,282,195 →
Application:
08/780,785 →
System and Method for Scheduling an Event Subject to the Availability of Requested Participants
Patent:
5,963,913 →
Application:
08/807,551 →
Network Request Distribution Based on Static Rules and Dynamic Performance Data
Patent:
6,173,322 →
Application:
08/866,247 →
System and Method for Input/Output Flow Control in a Multiprocessor Computer System
Patent:
5,974,456 →
Application:
08/892,879 →
Method, System and Computer Program Product for Profiling Thread Virtual Memory Accesses
Patent:
5,974,536 →
Application:
08/911,192 →
System Method and Computer Program Product for Organizing Page Caches
Patent:
6,115,790 →
Application:
08/921,257 →
Method, System, and Computer Program Product for Page Replication in a Non-Uniform Memory Access System
Patent:
6,167,437 →
Application:
08/921,545 →
Method, System and Computer Program Product for Managing Memory in a Non-Uniform Memory Access System
Patent:
6,289,424 →
Application:
08/933,833 →
Reverse Mapping Page Frame Data Structures to Page Table Entries.
Patent:
6,112,286 →
Application:
08/933,998 →
System, Method and Computer Program Product for Inter-Cell Page Sharing in a Distributed Shared Memory System
Patent:
6,148,379 →
Application:
08/933,999 →
Method, System and Computer Program Product for Virtual Memory Support for Managing Translation Look Aside Buffers with Multiple Page Size Support
Patent:
6,112,285 →
Application:
08/935,819 →
Method, System and Computer Program Product for Dynamically Allocating Large Memory Pages of Different Sizes
Patent:
6,182,089 →
Application:
08/935,820 →
Data Processing Synchronization with Automatic Queuing
Patent:
6,055,579 →
Application:
08/971,261 →
Method and Device for Controlling Access to Memory
Patent:
6,393,533 →
Application:
09/270,613 →
System and Method for Providing Access to a Bus
Patent:
7,197,589 →
Application:
09/315,806 →
Method and Apparatus for Broadcasting Invalidation Messages in a Computer System
Patent:
6,421,712 →
Application:
09/356,106 →
Input/Output Device Managed Timer Process
Patent:
6,594,787 →
Application:
09/399,437 →
Multiprocessor Node Controller Circuit and Method
Patent:
6,751,698 →
Application:
09/407,428 →
Scalable Hypercube Multiprocessor Network for Massive Parallel Processing
Patent:
6,973,559 →
Application:
09/408,972 →
System and Method for Distributing Output Queue Space
Patent:
6,532,501 →
Application:
09/409,605 →
System and Method for Memory Page Migration in a Multi-Processor Computer
Patent:
6,453,408 →
Application:
09/409,606 →
System and Method for Minimizing Error Correction Code Bits in Variable Sized Data Formats
Patent:
6,487,685 →
Application:
09/409,607 →
Method and Apparatus for Decoupling Processor Speed from Memory Subsystem Speed in a Node Controller
Patent:
6,546,451 →
Application:
09/409,639 →
Method and Apparatus for Processing Errors in a Computer System
Patent:
6,457,146 →
Application:
09/409,764 →
Method and Apparatus for Analyzing Buffer Allocation to a Device on a Peripheral Component Interconnect Bus
Patent:
6,397,274 →
Application:
09/409,765 →
Method and System for Handling Interrupts in a Node Controller Without Attached Processors
Patent:
6,564,277 →
Application:
09/409,766 →
Data Synchronizer for a Multiple Rate Clock Source and Method Thereof
Patent:
6,529,570 →
Application:
09/409,768 →
Upstream Situated Apparatus and Method for Providing High Bandwidth Data Flow Control to an Input/Output Unit
Patent:
6,622,182 →
Application:
09/409,805 →
System and Method for Shared Memory Protection in a Multiprocessor Computer
Patent:
6,381,681 →
Application:
09/410,120 →
Configurable Synchronizer for Double Data Rate Synchronous Dynamic Random Access Memory
Patent:
6,279,073 →
Application:
09/410,137 →
Method and Apparatus for Handling Invalidation Requests to Processors Not Present in a Computer System
Patent:
6,339,812 →
Application:
09/410,139 →
Method, System and Computer Program Product for Managing Memory in a Non-Uniform Memory Access System
Patent:
6,336,177 →
Application:
09/417,348 →
System and Method to Provide Power to a Sea of Gates Standard Cell Block from an Overhead Bump Grid
Patent:
6,281,108 →
Application:
09/418,597 →
Exchanging Messages Between Computer Systems Communicatively Coupled in a Computer System Network
Patent:
6,766,358 →
Application:
09/427,203 →
Synchronization of Hardware Simulation Processes
Patent:
6,879,948 →
Application:
09/459,995 →
Electrical Connector with Latching Backplate Assembly
Patent:
6,293,813 →
Application:
09/608,935 →
System, Method and Computer Program Product for Implementing Scalable Multi-Reader/Single-Writer Locks
Patent:
6,601,120 →
Application:
09/615,312 →
Method and Apparatus for Prefetching Information and Storing the Information in a Stream Buffer
Patent:
6,901,500 →
Application:
09/627,471 →
Method for Displaying Three-Dimensional Objects and a Computer-Readable Storage Medium Storing a Program for Achieving the Same
Patent:
6,683,607 →
Application:
09/636,098 →
Method and System for Calculating Interconnect Moments and Delay
Patent:
6,532,575 →
Application:
09/660,732 →
Method and System for Estimating Interconnect Delay
Patent:
6,853,969 →
Application:
09/713,842 →
Method and System for Determining Repeater Allocation Regions
Patent:
6,550,048 →
Application:
09/714,047 →
System and Method for Maintaining and Recovering Data Consistency Across Multiple Pages
Patent:
6,721,739 →
Application:
09/730,871 →
Packetized Data Transmissions in a Switched Router Architecture
Patent:
6,985,484 →
Application:
09/896,370 →
Memory Device Storing Data and Directory Information Thereon, and Method for Providing the Directory Information and the Data in the Memory Device
System and Method for Removing Data from Processor Caches in a Distributed Multi-Processor Computer System
Patent:
8,635,410 →
Application:
09/909,700 →
System and Method for Reducing Memory Latency During Read Requests
Patent:
6,678,798 →
Application:
09/909,701 →
Queue Circuit and Method for Memory Arbitration Employing Same
Patent:
7,406,554 →
Application:
09/909,704 →
System and Method for Memory Arbitration
Patent:
6,816,947 →
Application:
09/909,705 →
Method and System for Using High Count Invalidate Acknowledgements in Distributed Shared Memory Systems
Patent:
6,718,442 →
Application:
09/910,274 →
Method and System for Storing Data at Input/Output (I/O) Interfaces for a Multiprocessor System
Patent:
6,795,900 →
Application:
09/910,363 →
Method and System for Controlling Data Access Between at Least Two Memory Arrangements
Patent:
6,839,820 →
Application:
09/910,395 →
Method and System for Maintaining Data at Input/Output (I/O) Interfaces for a Multiprocessor System
Patent:
6,981,101 →
Application:
09/910,531 →
System and Method for Transferring Ownership of Data in a Distributed Shared Memory System
Patent:
6,829,683 →
Application:
09/910,572 →
Method and System for Covering Multiple Resources with a Single Credit in a Computer System
Patent:
7,007,097 →
Application:
09/910,584 →
Providing Shared and Non-Shared Access to Memory in a System with Plural Processor Coherence Domains
Patent:
7,069,306 →
Application:
09/910,591 →
Method and Apparatus for Managing Node Controllers Using Partitions in a Computer System
Patent:
6,877,029 →
Application:
09/910,629 →
Method and System for Efficient Use of a Multi-Dimensional Sharing Vector in a Computer System
Patent:
6,915,388 →
Application:
09/910,630 →
Method and System for Managing Data at an Input/Output Interface for a Multiprocessor System
Patent:
6,859,863 →
Application:
09/910,631 →
Method and Apparatus for Handling Invalidation Requests to Processors Not Present in a Computer System
Method and System for Cache Coherence in Dsm Multiprocessor System Without Growth of the Sharing Vector
System and Method for Improving Speed of Operation of Integrated Circuits
Patent:
6,621,300 →
Application:
10/131,309 →
System and Method for Repairing a Memory Column
Patent:
6,724,669 →
Application:
10/142,822 →
Clustered Filesystem
Computer Enclosure and Method for Manufacture
Patent:
6,813,151 →
Application:
10/219,654 →
System and Method for Conveying Information
Patent:
7,712,006 →
Application:
10/310,237 →
System and Method for Conveying Information
Patent:
7,447,794 →
Application:
10/310,400 →
Recovery and Relocation of a Distributed Name Service in a Cluster Filesystem
Multi-Class Heterogeneous Clients in a Clustered Filesystem
Clustered Filesystem for Mix of Trusted and Untrusted Nodes
Messaging Between Heterogeneous Clients of a Storage Area Network
System, Method, and Computer Program Product for Applying Different Transport Mechanisms for User Interface and Image Portions of a Remotely Rendered Image
Real-Time Storage Area Network
Relocation of Metadata Server with Outstanding Dmapi Requests
Network filesystem asynchronous I/O scheduling
Detection and Control of Resource Congestion by a Number of Processors
System and Method for Reducing Memory Latency During Read Requests
Patent:
6,938,128 →
Application:
10/725,897 →
System and Method for Performing Address Translation in a Computer System
System and Method for Performing Memory Operations in a Computing System
Patent:
7,398,359 →
Application:
10/836,932 →
Multiprocessor Node Controller Circuit and Method
Server Product Faceplate
Patent:
464,056 →
Application:
29/146,729 →
Set of Multi Device Faceplates
Patent:
473,561 →
Application:
29/148,943 →
Related Assignments
(20)
Other recorded transfers of the patents in this record — the chain of ownership.
Change of Name
Apr 16, 2014
From: SILICON GRAPHICS INTERNATIONAL, INC.
To: SGI INTERNATIONAL, INC.
Reel/Frame 032706/0679 →
Merger
Apr 16, 2014
From: SGI INTERNATIONAL, INC.
To: SILICON GRAPHICS INTERNATIONAL CORP.
Reel/Frame 032692/0663 →
Assignment of Assignor's Interest
Apr 16, 2014
From: SILICON GRAPHICS, INC.
To: SILICON GRAPHICS INTERNATIONAL, INC.
Reel/Frame 032692/0491 →
Merger
Apr 17, 2014
From: SGI INTERNATIONAL, INC.
To: SILICON GRAPHICS INTERNATIONAL CORP.
Reel/Frame 032704/0875 →
Change of Name
Apr 17, 2014
From: SILICON GRAPHICS INTERNATIONAL, INC.
To: SGI INTERNATIONAL, INC.
Reel/Frame 032712/0768 →
Assignment of Assignor's Interest
Apr 17, 2014
From: SILICON GRAPHICS, INC.
To: SILICON GRAPHICS INTERNATIONAL, INC.
Reel/Frame 032705/0001 →
Assignment of Assignor's Interest
Apr 18, 2014
From: SILICON GRAPHICS, INC.
To: SILICON GRAPHICS INTERNATIONAL, INC.
Reel/Frame 032714/0032 →
Merger
Apr 18, 2014
From: SGI INTERNATIONAL, INC.
To: SILICON GRAPHICS INTERNATIONAL CORP.
Reel/Frame 032714/0427 →
Change of Name
Apr 18, 2014
From: SILICON GRAPHICS INTERNATIONAL, INC.
To: SGI INTERNATIONAL, INC.
Reel/Frame 032714/0230 →
Assignment of Assignor's Interest
Jan 22, 2015
From: SILICON GRAPHICS, INC.
To: SILICON GRAPHICS INTERNATIONAL, INC.
Reel/Frame 034804/0446 →
Change of Name
Jan 22, 2015
From: SILICON GRAPHICS INTERNATIONAL, INC.
To: SGI INTERNATIONAL, INC.
Reel/Frame 034804/0661 →
Merger
Jan 22, 2015
From: SGI INTERNATIONAL, INC.
To: SILICON GRAPHICS INTERNATIONAL CORP.
Reel/Frame 034804/0437 →
Assignment of Assignor's Interest
Jan 27, 2015
From: NAGHSHINEH, KIANOOSH; LENOSKI, DANIEL E.
To: SILICON GRAPHICS, INC.
Reel/Frame 034823/0657 →
Security Interest
Mar 13, 2015
From: SILICON GRAPHICS INTERNATIONAL CORP.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035200/0722 →
Order. . .Authorizing the Sale of All or Substantially All of the Assets of the Debtors Free and Clear of All Liens, Claims, Encumbrances, and Interests. . .
Jul 25, 2016
From: U.S. BANK NATIONAL ASSOCIATION, AS TRUSTEE
To: SILICON GRAPHICS INC
Reel/Frame 039461/0765 →
Order. . .Authorizing the Sale of All or Substantially All of the Assets of the Debtors Free and Clear of All Liens, Encumbrances, and Interests.
Jul 25, 2016
From: FOOTHILL CAPITAL CORPORATION
To: SILICON GRAPHICS, INC.
Reel/Frame 039461/0522 →
Order. . . Authorizing the Sale of All or Substantially All of the Assets of the Debtors Free and Clear of All Liens, Claims, Encumbrances, and Interests.
Jul 25, 2016
From: WELLS FARGO FOOTHILL CAPITAL, INC.
To: SILICON GRAPHICS INC.
Reel/Frame 039461/0418 →
Order...Authorizing the Sale of All or Substantially All of the Assets of the Debtors Free and Clear of All Liens, Encumbrances, and Interests.
Jul 26, 2016
From: WELLS FARGO FOOTHILL CAPITAL, INC.
To: SILICON GRAPHICS INC.
Reel/Frame 039480/0846 →
Release of Security Interest
Nov 2, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS AGENT
To: SILICON GRAPHICS INTERNATIONAL CORP.
Reel/Frame 040545/0362 →
Assignment of Assignor's Interest
Oct 4, 2017
From: SILICON GRAPHICS INTERNATIONAL CORP.
To: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Reel/Frame 044128/0149 →