Patent Assignment
Reel/Frame 044975/0554
Assignment of Assignor's Interest
Recorded: 2017-12-26
Pages: 21
Assignor
PERICOM SEMICONDUCTOR CORPORATION
Executed: 2017-12-22
Assignee
DIODES INCORPORATED
4949 HEDGCOXE ROAD, PLANO, TEXAS, 75024
Covered Properties
(138)
Digital Jitter Attenuator Using Selection of Multi-Phase Clocks and Auto-Centering Elastic Buffer for a Token Ring Network
Patent:
5,502,750 →
Application:
08/259,910 →
All-Cmos High-Impedance Output Buffer for a Bus Driven by Multiple Power-Supply Voltages
Patent:
5,444,397 →
Application:
08/318,238 →
Frequency Synthesizer with Adaptive Loop Bandwidth
Patent:
5,631,587 →
Application:
08/321,430 →
Programmable Substrate Bias Generator with Current-Mirrored Differential Comparator and Isolated Bulk-Node Sensing Transistor for Bias Voltage Control
Patent:
5,694,072 →
Application:
08/520,028 →
Meta-Stable-Resistant Front-End to a Synchronizer with Asynchronous Clear and Asynchronous Second-Stage Clock Selector
Patent:
5,764,710 →
Application:
08/573,407 →
Digital Jitter Attenuator Using Selection of Multi-Phase Clocks and Auto-Centering Elastic Buffer
Patent:
5,602,882 →
Application:
08/588,902 →
Parallel Micro-Relay Bus Switch for Computer Network Communication with Reduced Crosstalk and Low on-Resistance Using Charge Pumps
Patent:
5,808,502 →
Application:
08/622,703 →
Packet-Based Dynamic De-Skewing for Network Switch with Local or Central Clock
Patent:
5,719,862 →
Application:
08/649,114 →
High-Drive Cmos Output Buffer with Noise Supression Using Pulsed Drivers and Neighbor-Sensing
Patent:
5,717,343 →
Application:
08/685,142 →
Avalanche-Enhanced Cmos Transistor for Eprom/Eeprom and Esd-Protection Structures
Patent:
5,719,427 →
Application:
08/783,626 →
Cmos Pecl Driver with Programmable Current for Varying Voltage Swings and Termination Types
Patent:
5,874,837 →
Application:
08/847,819 →
Noise Supression Using Neighbor-Sensing for a Cmos Output Buffer with a Large Dc Current
Patent:
5,963,047 →
Application:
08/917,148 →
Twisted Pair Driver with Staggered Differential Drivers and Glitch Free Binary to Multi Level Transmit Encoder
Patent:
5,917,340 →
Application:
08/946,739 →
Self-Biasing Cmos Pecl Receiver with Wide Common-Mode Range and Multi-Level-Transmit to Binary Decoder
Patent:
5,963,053 →
Application:
08/947,430 →
Voltage Booster with Pulsed Initial Charging and Delayed Capacitive Boost Using Charge-Pumped Delay Line
Patent:
5,847,946 →
Application:
08/990,894 →
Bus Switch Having Both P- and N-Channel Transistors for Constant Impedance Using Isolation Circuit for Live-Insertion When Powered Down
Patent:
6,034,553 →
Application:
09/004,929 →
Cancellation of Injected Charge in a Bus Switch
Patent:
6,075,400 →
Application:
09/133,743 →
Undershoot-Isolating Mos Bus Switch
Patent:
6,052,019 →
Application:
09/182,347 →
Voltage Booster with Reduced Vpp Current and Self-Timed Control Loop Without Pulse Generator
Patent:
5,946,204 →
Application:
09/197,322 →
Actively-Driven Thin-Oxide Mos Transistor Shunt for Esd Protection of Multiple Independent Supply Busses in a Mixed-Signal Chip
Patent:
6,118,640 →
Application:
09/251,722 →
Accurate Pll Charge Pump with Matched Up/Down Currents from Vds-Compensated Common-Gate Switches
Patent:
6,124,741 →
Application:
09/264,284 →
Rf Front-End with Signal Cancellation Using Receiver Signal to Eliminate Duplexer for a Cordless Phone
Patent:
6,169,912 →
Application:
09/283,129 →
Translator Switch Transistor with Output Voltage Adjusted to Match a Reference by Controlling Gate and Substrate Charge Pumps
Patent:
6,114,876 →
Application:
09/315,775 →
Versatile Gate-Array Cell with Interstitial Transistors for Compact Flip-Flops with Set or Clear
Patent:
6,144,241 →
Application:
09/315,776 →
Self-Biasing Cmos Pecl Receiver with Wide Common-Mode Range and Multi-Level-Transmit to Binary Decoder
Patent:
6,049,229 →
Application:
09/348,092 →
Cmos Output Buffer with Negative Feedback Dynamic-Drive Control and Dual P,N Active-Termination Transmission Gates
Patent:
6,184,730 →
Application:
09/432,368 →
CMOS over voltage-tolerant output buffer without transmission gate
Patent:
6,208,178 →
Application:
09/511,011 →
CMOS output buffer with feedback control on sources of pre-driver stage
Patent:
6,255,867 →
Application:
09/511,014 →
Quiet output buffers with neighbor sensing of wide bus and control signals
Patent:
6,329,835 →
Application:
09/511,015 →
Low-power cmos voltage follower using dual differential amplifiers driving high-current constant-voltage push-pull output buffer
Patent:
6,285,256 →
Application:
09/553,502 →
Active Vcc-to-Vss Esd Clamp with Hystersis for Low Supply Chips
Patent:
6,552,886 →
Application:
09/607,458 →
Bi-Directional Undershoot-Isolating Bus Switch with Directional Control
Patent:
6,559,703 →
Application:
09/607,460 →
Triple-slope clock driver for reduced EMI
Patent:
6,335,638 →
Application:
09/607,558 →
Digital-To-Analog Dac-Driven Phase-Locked Loop Pll with Slave Pll's Driving Dac Reference Voltages
Patent:
6,693,987 →
Application:
09/679,682 →
Complementary differential amplifier with resistive loads for wide common-mode input range
Patent:
6,252,435 →
Application:
09/679,683 →
Fine-tuning phase-locked loop PLL using variable resistor between dual PLL loops
Patent:
6,281,727 →
Application:
09/679,684 →
Zero standby-current power-on reset circuit with schmidt trigger sensing
Patent:
6,288,584 →
Application:
09/679,746 →
Low-voltage differential-signalling output buffer with pre-emphasis
Patent:
6,288,581 →
Application:
09/681,101 →
Dual-sided undershoot-isolating bus switch
Patent:
6,320,408 →
Application:
09/681,236 →
Active fail- safe detect circuit for differential receiver
Patent:
6,288,577 →
Application:
09/681,237 →
Internal Esd-Shunt Diode Protected by Delayed External Mosfet Switch
Zero-DC-power active termination with CMOS overshoot and undershoot clamps
Patent:
6,351,138 →
Application:
09/681,344 →
Multi-Port Pci-to-Pci Bridge with Combined Address Fifos but Separate Data Fifos for Concurrent Transactions
Patent:
6,691,200 →
Application:
09/681,569 →
Bidirectional Active Voltage Translator with Bootstrap Switches for Mixed-Supply Vlsi
Patent:
6,366,124 →
Application:
09/681,651 →
Reduced-Undershoot Cmos Output Buffer with Delayed Vol-Driver Transistor
Patent:
6,359,478 →
Application:
09/682,437 →
CMOS low-voltage PECL driver with initial current boost
Patent:
6,424,217 →
Application:
09/682,459 →
Esd-Protection Device with Active R-C Coupling to Gate of Large Output Transistor
Low-Power Substrate Bias Generator Disabled by Comparators for Supply Over-Voltage Protection and Bias Target Voltage
Patent:
6,486,727 →
Application:
09/682,736 →
Mos Variable Capacitor with Controlled Dc/Dv and Voltage Drop Across W of Gate
Patent:
6,541,814 →
Application:
09/682,993 →
Twisted-Ring Oscillator and Delay Line Generating Multiple Phases Using Differential Dividers and Comparators to Match Delays
Patent:
6,426,662 →
Application:
09/683,040 →
Spread-Spectrum Clock Buffer/Driver That Modulates Clock Period by Switching Loads
Patent:
6,501,307 →
Application:
09/683,041 →
Capacitivly-Coupled Extended Swing Zero-Dc-Power Active Termination with Cmos Overshoot/Undershoot Clamps
Patent:
6,429,678 →
Application:
09/683,127 →
Switched Ioh and Iol Current Sources for Cmos Low-Voltage Pecl Driver with Self-Timed Pull-Down Current Boost
Variable Capacitor Using Mos Gated Diode with Multiple Segments to Limit Dc Current
Patent:
6,674,116 →
Application:
09/683,709 →
Reduced Clock-Skew in a Multi-Output Clock Driver by Selective Shorting Together of Clock Pre-Outputs
Patent:
6,583,659 →
Application:
09/683,744 →
Esd-Isolation Circuit Driving Gate of Bus-Switch Transistor During Esd Pulse Between Two I/O Pins
Patent:
6,738,242 →
Application:
09/683,968 →
Voltage-Controlled Crystal Oscillator (Vcxo) Using Mos Varactors Coupled to an Adjustable Frequency-Tuning Voltage
Patent:
6,628,175 →
Application:
10/063,167 →
Fail-Safe Circuit with Low Input Impedance Using Active-Transistor Differential-Line Terminators
Patent:
6,525,559 →
Application:
10/063,416 →
Differential Clock Signals Encoded with Data
Patent:
7,020,208 →
Application:
10/063,621 →
Pin-To-Pin Esd-Protection Structure Having Cross-Pin Activation
Patent:
6,757,147 →
Application:
10/063,622 →
Near-Zero Propagation-Delay Active-Terminator Using Transmission Gate
Patent:
6,686,763 →
Application:
10/063,827 →
Power Down Mode Signaled by Differential Transmitter's High-Z State Detected by Receiver Sensing Same Voltage on Differential Lines
Patent:
6,593,801 →
Application:
10/064,074 →
Power Down Circuit Detecting Duty Cycle of Input Signal
Patent:
6,552,578 →
Application:
10/064,082 →
Phase-Locked Loop (Pll) with Mixer for Subtracting Outer-Band Phase Noise
Patent:
6,573,769 →
Application:
10/064,271 →
Isolating Circuit for P/N Transmission Gate During Hot-Plug Insertion
Patent:
6,670,829 →
Application:
10/064,487 →
Latched Active Fail-Safe Circuit for Protecting a Differential Receiver
Patent:
6,650,149 →
Application:
10/064,776 →
Differential Clock Driver with Transmission-Gate Feedback to Reduce Voltage-Crossing Sensitivity to Input Skew
Patent:
6,583,656 →
Application:
10/064,831 →
Live-Insertion Pmos Biasing Circuit for Nmos Bus Switch
Patent:
6,608,517 →
Application:
10/064,945 →
Low-Voltage Differential Driver with Opened Eye Pattern
Patent:
6,590,432 →
Application:
10/065,222 →
Stacked-Nmos-Triggered Scr Device for Esd-Protection
Patent:
6,867,957 →
Application:
10/065,364 →
Current-Compensated Cmos Output Buffer Adjusting Edge Rate for Process, Temperature, and Vcc Variations
Patent:
6,690,192 →
Application:
10/065,420 →
Substrate-Triggering of Esd-Protection Device
Patent:
6,724,592 →
Application:
10/248,018 →
Pll with Built-in Filter-Capacitor Leakage-Tester with Current Pump and Comparator
Patent:
7,132,835 →
Application:
10/248,683 →
Power-Down Activated by Differential-Input Multiplier and Comparator
Patent:
6,791,371 →
Application:
10/249,280 →
Voltage Booster with Increased Voltage Boost Using Two Pumping Capacitors
Patent:
6,693,480 →
Application:
10/249,282 →
Bus Relay and Voltage Shifter Without Direction Control Input
Patent:
6,724,224 →
Application:
10/249,413 →
Cmos Differential Input Buffer with Source-Follower Input Clamps
Patent:
6,801,080 →
Application:
10/249,414 →
Data Register for Buffering Double-Data-Rate Drams with Reduced Data-Input-Path Power Consumption
Patent:
6,741,111 →
Application:
10/249,581 →
Power Down Mode Signaled by Differential Transmitter's High-Z State Detected by Receiver Sensing Same Voltage on Differential Lines
Patent:
6,674,319 →
Application:
10/249,643 →
Direct Power-to-Ground Esd Protection with an Electrostatic Common-Discharge Line
Patent:
6,756,834 →
Application:
10/249,670 →
Ddr Memory Modules with Input Buffers Driving Split Traces with Trace-Impedance Matching at Trace Junctions
Patent:
6,947,304 →
Application:
10/249,845 →
A Double-Data Rate Phase-Locked-Loop with Phase Aligners to Reduce Clock Skew
Patent:
6,859,109 →
Application:
10/250,000 →
Clock Presence Detector Comparing Differential Clock to Common-Mode Voltage
Patent:
6,791,369 →
Application:
10/604,284 →
A Divide-by-X.5 Circuit with Frequency Doubler and Differential Oscillator
Patent:
6,882,229 →
Application:
10/604,461 →
A Dual-Loop Pll with Dac Offset for Frequency Shift While Maintaining Input Tracking
Patent:
6,762,634 →
Application:
10/604,730 →
Active Esd Shunt with Transistor Feedback to Reduce Latch-Up Susceptibility
Patent:
6,989,979 →
Application:
10/605,321 →
Accurate Voltage Comparator with Voltage-to-Current Converters for Both Reference and Input Voltages
Patent:
6,940,318 →
Application:
10/605,534 →
Variable Capacitor Using Mos Gated Diode with Multiple Segments to Limit Dc Current
Patent:
6,794,707 →
Application:
10/707,041 →
Trace-Impedance Matching at Junctions of Multi-Load Signal Traces to Eliminate Termination
Patent:
6,927,992 →
Application:
10/707,249 →
Converging Error-Recovery for Multi-Bit-Incrementing Gray Code
Patent:
7,149,956 →
Application:
10/708,095 →
Adapter Board for Stacking Ball-Grid-Array (Bga) Chips
Patent:
7,126,829 →
Application:
10/708,101 →
Dynamic Pci-Bus Pre-Fetch with Separate Counters for Commands of Different Data-Transfer Lengths
Patent:
7,107,384 →
Application:
10/708,412 →
A Current-Mirrored Crystal-Oscillator Circuit Without Feedback to Reduce Power Consumption
Patent:
7,002,422 →
Application:
10/708,939 →
A Muxed-Output Double-Date-Rate-2 (DDR2) Register with Fast Propagation Delay
Patent:
6,842,059 →
Application:
10/709,132 →
Self-Biasing Differential Buffer with Transmission-Gate Bias Generator
Patent:
6,930,550 →
Application:
10/709,267 →
Reduced-Capacitance Bus Switch in Isolated P-Well Shorted to Source and Drain During Switching
Patent:
6,965,253 →
Application:
10/710,298 →
Memory Module with Dynamic Termination Using Bus Switches Timed by Memory Clock and Chip Select
Patent:
7,068,064 →
Application:
10/710,475 →
Crystal Clock Generator Operating at Third Overtone of Crystal's Fundamental Frequency
Patent:
7,002,423 →
Application:
10/710,549 →
A Cmos Voltage-Controlled Oscillator (Vco) with a Current-Adaptive Resistor for Improved Linearity
Patent:
7,015,766 →
Application:
10/710,657 →
Manufacturing Process for a Surface-Mount Metal-Cavity Package for an Oscillator Crystal Blank
Method of Making a Surface Mountable Pcb Module
Patent:
7,246,434 →
Application:
10/711,869 →
4X Crystal Frequency Multiplier with Op Amp Buffer Between 2X Multiplier Stages
Patent:
7,053,725 →
Application:
10/904,128 →
Dynamic Allocation of Pci Express Lanes Using a Differential Mux to an Additional Lane to a Host
Patent:
7,174,411 →
Application:
10/904,880 →
Shared Network-Interface Controller (Nic) Using Advanced Switching (as) Turn-Pool Routing Field to Select from Among Multiple Contexts for Multiple Processors
Patent:
7,464,174 →
Application:
10/906,783 →
Redundant Back-Up Pll Oscillator Phase-Locked to Primary Oscillator with Fail-Over to Back-Up Oscillator Without a Third Oscillator
Patent:
7,173,495 →
Application:
10/907,558 →
Pseudo-Ethernet Switch Without Ethernet Media-Access-Controllers (Mac's) That Copies Ethernet Context Registers Between Pci-Express Ports
Patent:
7,480,303 →
Application:
10/908,515 →
Substrate-Sensing Voltage Sensor for Voltage Comparator with Voltage-to-Current Converters for Both Reference and Input Voltages
Patent:
6,989,692 →
Application:
10/908,683 →
Wide-Band High-Gain Limiting Amplifier with Parallel Resistor-Transistor Source Loads
Optimized Topographies for Dynamic Allocation of Pci Express Lanes Using Differential Muxes to Additional Lanes to a Host
Patent:
7,363,417 →
Application:
11/161,612 →
Visual or Multimedia Interface Bus Switch with Level-Shifted Ground and Input Protection Against Non-Compliant Transmission-Minimized Differential Signaling (Tmds) Transmitter
Patent:
7,259,589 →
Application:
11/162,638 →
Pre-Emphasis and De-Emphasis Emulation and Wave Shaping Using a Programmable Delay Without Using a Clock
Patent:
7,391,251 →
Application:
11/164,000 →
Crystal Clock Generator Operating at Third Overtone of Crystal's Fundamental Frequency
Multiple Channel Switch Using Differential De-Mux Amplifier and Differential Mux Equalizer
Patent:
7,545,834 →
Application:
11/306,763 →
Duty Cycle Correction Using Input Clock and Feedback Clock of Phase-Locked-Loop (Pll)
Patent:
7,375,563 →
Application:
11/308,568 →
Flow-Splitting & Buffering Pci Express Switch to Reduce Head-of-Line Blocking
Patent:
7,308,523 →
Application:
11/308,597 →
Swiveling Offset Adapter Dongle for Reducing Blockage of Closely-Spaced Video Connectors
Patent:
7,485,007 →
Application:
11/749,311 →
Redriver with Output Receiver Detection That Mirrors Detected Termination on Output to Input
Out-Of-Band Signaling Using Detector with Equalizer, Multiplier and Comparator
Serial Link Driver Interface for a Communication System
Patent:
7,915,923 →
Application:
12/400,708 →
Multi-Mode Charger Device
Patent:
8,237,414 →
Application:
12/424,081 →
Clock Signal Noise Shaping
Patent:
8,044,711 →
Application:
12/704,150 →
Trace Canceller with Equalizer Adjusted for Trace Length Driving Variable-Gain Amplifier with Automatic Gain Control Loop
Voltage Conversion
Patent:
8,400,183 →
Application:
13/008,328 →
Re-Driver with Pre-Emphasis Injected Through a Transformer and Tuned by an L-C Tank
In-Situ Cable Unplug Detector Operating During Normal Signaling Mode
Signal Conditioning by Combining Precursor, Main, and Post Cursor Signals Without a Clock Signal
Redriver with Output Receiver Detection That Mirrors Detected Termination on Output to Input
Multi-Mode Charger Device
Patent:
9,030,155 →
Application:
13/540,515 →
Auto Plug-In And Plug-Out VGA Port Detection
Patent:
8,966,128 →
Application:
13/713,390 →
Intermediary Signal Conditioning Device With Interruptible Detection Mode
Patent:
8,804,792 →
Application:
13/766,647 →
Differential Voltage-Mode Buffer with Current Injection
Patent:
8,749,285 →
Application:
13/833,132 →
Redriver with Output Receiver Detection That Mirrors Detected Termination on Output to Input
Overvoltage Protection Analog Switch
Patent:
9,461,465 →
Application:
14/138,708 →
Trace Canceller with Equalizer Adjusted for Trace Length Driving Variable-Gain Amplifier with Automatic Gain Control Loop
Hybrid Repeater for Supporting Backward Compatibility
In-Situ Cable Unplug Detector Operating During Normal Signaling Mode
Crosstalk Reduction in Multiplexers
Trace Canceller with Equalizer Adjusted for Trace Length Driving Variable-Gain Amplifier with Automatic Gain Control Loop
Related Assignments
(2)
Other recorded transfers of the patents in this record — the chain of ownership.