IP Library Granted Patent US 11,404,277
Granted Patent B2
US 11,404,277 · App. 16/879,378 · Granted Aug 2, 2022

Die sidewall coatings and related methods

Inventors: Francis J. Carney (Mesa, AZ); Yusheng Lin (Phoenix, AZ); Michael J. Seddon (Gilbert, AZ); Chee Hiong Chew (Seremban, MY); Soon Wei Wang (Seremban, MY); Eiji Kurose (Oizumi-machi, JP)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L21/302H01L21/48H01L21/561H01L21/565H01L21/78H01L23/12H01L23/3185H01L24/04H01L24/26H01L2224/94
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Quick Facts
Patent No.
US 11,404,277
App. No.
16/879,378
Granted
Aug 2, 2022
Kind
B2
Abstract

Various implementations of a method of forming a semiconductor package may include forming a plurality of notches into the first side of a semiconductor substrate; applying a permanent coating material into the plurality of notches; forming a first organic material over the first side of the semiconductor substrate and the plurality of notches; thinning a second side of the semiconductor substrate opposite the first side one of to or into the plurality of notches; and singulating the semiconductor substrate through the permanent coating material into a plurality of semiconductor packages.

Claims (11)

1. A semiconductor device comprising:

a first side comprising one or more electrical contacts;

three or more die side walls comprising a thickness;

one of a permanent die support structure, a temporary die support structure, or any combination thereof coupled to the first side; and

an organic permanent coating material coupled only across the thickness of the three or more die side walls.

2. The device of claim 1 wherein the thickness is between 0.1 microns and 125 microns.

3. The device of claim 1 , wherein a warpage of the first side or an opposing second side is less than 200 microns.

4. The device of claim 1 , wherein a perimeter of the semiconductor device is rectangular and a size of the first side is at least 6 mm by 6 mm to 211 mm by 211 mm.

5. The device of claim 1 , wherein a perimeter of the first side is a closed shape and wherein the one of the permanent die support structure, the temporary die support structure, or any combination thereof comprises a perimeter comprising a closed shape.

6. The device of claim 1 , further comprising one of a second permanent die support structure or a temporary die support structure coupled to an opposing second side.

7. The device of claim 1 , wherein the one of the permanent die support structure, the temporary die support structure, or any combination thereof comprises two or more layers.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL 053613, FRAME 0621 Recorded Aug 17, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064618/0942 →
SECURITY INTEREST Recorded Aug 27, 2020
From: FAIRCHILD SEMICONDUCTOR CORPORATION; SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 053613/0621 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 20, 2020
From: CARNEY, FRANCIS J.; LIN, YUSHENG; SEDDON, MICHAEL J.; CHEW, CHEE HIONG; WANG, SOON WEI; KUROSE, EIJI
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 052716/0120 →
Continuity (8)
Continuation In Part 16862120 · Apr 29, 2020
Continuation In Part 16861740 · Apr 29, 2020
Continuation In Part 16862063 · Apr 29, 2020
Continuation In Part 16702958 · Dec 4, 2019
Continuation In Part 16395822 · Apr 26, 2019
Division 15679661 · Aug 17, 2017
Continuation 15679664 · Aug 17, 2017
Related Publication 20200279747A1 · Sep 3, 2020