IP Library Granted Patent US 11,348,796
Granted Patent B2
US 11,348,796 · App. 16/879,429 · Granted May 31, 2022

Backmetal removal methods

Inventors: Michael J. Seddon (Gilbert, AZ); Francis J. Carney (Phoenix, AZ); Chee Hiong Chew (Seremban, MY); Soon Wei Wang (Seremban, MY); Eiji Kurose (Oizumi-machi, JP)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L21/302H01L21/48H01L21/561H01L21/565H01L21/78H01L23/12H01L23/3185H01L24/04H01L24/26H01L2224/94
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Quick Facts
Patent No.
US 11,348,796
App. No.
16/879,429
Granted
May 31, 2022
Kind
B2
Abstract

Various implementations of a method of forming a semiconductor package may include forming a plurality of notches into the first side of a semiconductor substrate; forming an organic material over the first side of the semiconductor substrate and the plurality of notches; thinning a second side of the semiconductor substrate opposite the first side one of to or into the plurality of notches; stress relief etching the second side of the semiconductor substrate; applying a backmetal over the second side of the semiconductor substrate; removing one or more portions of the backmetal through jet ablating the second side of the semiconductor substrate; and singulating the semiconductor substrate through the permanent coating material into a plurality of semiconductor packages.

Claims (38)

1. A method of forming a semiconductor package, the method comprising:

forming a plurality of notches into a first side of a semiconductor substrate;

forming an organic material over the first side of the semiconductor substrate and the plurality of notches;

thinning a second side of the semiconductor substrate opposite the first side one of to or into the plurality of notches;

stress relief etching the second side of the semiconductor substrate;

applying a backmetal over the second side of the semiconductor substrate;

removing one or more portions of the backmetal through jet ablating the second side of the semiconductor substrate; and

singulating the semiconductor substrate through the organic material into a plurality of semiconductor packages.

2. The method of claim 1 , wherein the organic material is applied using a molding process.

3. The method of claim 1 , wherein a perimeter of each of a plurality of semiconductor die comprised in the semiconductor substrate each comprises a closed shape.

4. The method of claim 1 , wherein forming the organic material over the first side of the semiconductor substrate further comprises forming a permanent die support structure, a temporary die support structure, or any combination thereof comprising a perimeter comprising a closed shape.

5. The method of claim 4 , further comprising forming one of a second permanent die support structure or a temporary die support structure coupled to the second side of the semiconductor substrate.

6. The method of claim 4 , wherein the one of the permanent die support structure, the temporary die support structure, or any combination thereof comprises two or more layers.

7. A method of forming a semiconductor package, the method comprising:

forming a plurality of notches into the first side of a semiconductor substrate;

forming an organic material over the first side of the semiconductor substrate and the plurality of notches;

thinning a second side of the semiconductor substrate opposite the first side toward the plurality of notches to expose the organic material in the plurality of notches;

applying a backmetal over the second side of the semiconductor substrate;

removing one or more portions of the backmetal coupled with the organic material through jet ablating the second side of the semiconductor substrate; and

singulating the semiconductor substrate into a plurality of semiconductor packages.

8. The method of claim 7 , wherein the organic material is applied using a molding process.

9. The method of claim 7 , a perimeter of each of a plurality of semiconductor die comprised in the semiconductor substrate each comprises a closed shape.

10. The method of claim 7 , wherein forming the organic material over the first side of the semiconductor substrate further comprises forming a permanent die support structure, a temporary die support structure, or any combination thereof comprising a perimeter comprising a closed shape.

11. The method of claim 10 , further comprising forming one of a second permanent die support structure or a temporary die support structure coupled to the second side of the semiconductor substrate.

12. The method of claim 10 , wherein the one of the permanent die support structure, the temporary die support structure, or any combination thereof comprises two or more layers.

13. The method of claim 7 , further comprising forming a plurality of electrical connectors on the first side of the semiconductor substrate.

14. A method of forming a semiconductor package, the method comprising:

forming an organic material over the first side of the semiconductor substrate and a plurality of notches in the semiconductor substrate;

thinning a second side of a semiconductor substrate opposite the first side toward the plurality of notches to expose the organic material in the plurality of notches;

applying a backmetal over the second side of the semiconductor substrate;

removing one or more portions of the backmetal through jet ablating the second side of the semiconductor substrate; and

singulating the semiconductor substrate into a plurality of semiconductor packages.

15. The method of claim 14 , wherein the plurality of notches are die streets between a plurality of die comprised on the semiconductor substrate.

16. The method of claim 14 , wherein a perimeter of each of a plurality of semiconductor die comprised in the semiconductor substrate each comprises a closed shape.

17. The method of claim 14 , wherein forming the organic material over the first side of the semiconductor substrate further comprises forming a permanent die support structure, a temporary die support structure, or any combination thereof comprising a perimeter comprising a closed shape.

18. The method of claim 17 , further comprising forming one of a second permanent die support structure or a temporary die support structure coupled to the second side of the semiconductor substrate.

19. The method of claim 17 , wherein the one of the permanent die support structure, the temporary die support structure, or any combination thereof comprises two or more layers.

20. The method of claim 14 , further comprising forming a plurality of electrical connectors on the first side of the semiconductor substrate.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL 053613, FRAME 0621 Recorded Aug 17, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064618/0942 →
SECURITY INTEREST Recorded Aug 27, 2020
From: FAIRCHILD SEMICONDUCTOR CORPORATION; SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 053613/0621 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 20, 2020
From: SEDDON, MICHAEL J.; CARNEY, FRANCIS J.; CHEW, CHEE HIONG; WANG, SOON WEI; KUROSE, EIJI
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 052716/0464 →
Continuity (8)
Continuation In Part 16861740 · Apr 29, 2020
Continuation In Part 16862120 · Apr 29, 2020
Continuation In Part 16862063 · Apr 29, 2020
Continuation In Part 16702958 · Dec 4, 2019
Continuation In Part 16395822 · Apr 26, 2019
Division 15679661 · Aug 17, 2017
Continuation 15679664 · Aug 17, 2017
Related Publication 20200286736A1 · Sep 10, 2020