Security circuitry for bonded structures
A bonded structure is disclosed. The bonded structure can include a first semiconductor element having a first front side and a first back side opposite the first front side. The bonded structure can include a second semiconductor element having a second front side and a second back side opposite the second front side, the first front side of the first semiconductor element directly bonded to the second front side of the second semiconductor element along a bond interface without an adhesive. The bonded structure can include security circuitry extending across the bond interface, the security circuitry electrically connected to the first and second semiconductor elements.
1. A bonded structure comprising:
a first semiconductor element having a first front side and a first back side opposite the first front side;
a second semiconductor element having a second front side and a second back side opposite the second front side, the first front side of the first semiconductor element directly bonded to the second front side of the second semiconductor element along a bond interface without an adhesive; and
security circuitry extending across the bond interface, the security circuitry electrically connected to the first and second semiconductor elements, the security circuitry configured to prevent external access to at least some data or circuitry in at least one of the first and second semiconductor elements.
2. The bonded structure of claim 1 , wherein the security circuitry comprises a first security circuit block on the first semiconductor element and a second security circuit block on the second semiconductor element, the first and second semiconductor elements having respective first and second conductive contact pads directly bonded to one another without an adhesive to electrically connect the first and second security circuit blocks.
3. The bonded structure of claim 2 , wherein neither the first nor second semiconductor elements provide an independent fault injection pathway sufficient to provide false authentication.
4. The bonded structure of claim 2 , wherein a first output signal of the first security circuit block in response to a fault injection is independent of a second output signal of the second security circuit block in response to the fault injection.
5. The bonded structure of claim 2 , wherein a fault injection into the first security circuit block does not trigger an authentication signal necessary for access in the second security circuit block, and vice versa.
6. The bonded structure of claim 2 , wherein the first and second security blocks comprise duplicate circuitry electrically connected to monitoring circuitry, the monitoring circuitry configured to compare first and second outputs from the first and second security blocks in response to respective first and second input signals, and, based on the comparison, to trigger an alert signal if the first and second outputs are determined to be different or non-complementary.
7. The bonded structure of claim 1 , further comprising a detection circuit in at least one of the first and second semiconductor elements, the detection circuit configured to determine whether a fault injection has occurred in the security circuitry.
8. The bonded structure of claim 7 , further comprising a response circuit configured to, in response to an alert signal from the detection circuit, deny electronic access to the first and second semiconductor elements.
9. The bonded structure of claim 1 , further comprising first active circuitry at or near the first front side of the first semiconductor element and second active circuitry at or near the second front side of the second semiconductor element.
10. The bonded structure of claim 1 , further comprising a protective element bonded to the first back side of the first semiconductor element, the protective element including an obstructive material covering active circuitry of the first semiconductor element, the obstructive material configured to obstruct external access to the active circuitry.
11. A bonded structure comprising:
a first semiconductor element having a first front side and a first back side opposite the first front side;
a second semiconductor element having a second front side and a second back side opposite the second front side, the first front side of the first semiconductor element bonded to the second front side of the second semiconductor element along a bond interface, the second semiconductor element comprising an active security circuit block; and
a first dummy security circuit block in at least the first semiconductor element, wherein the first dummy security circuit block comprises circuitry having features of security circuitry but not functioning as security circuitry.
12. The bonded structure of claim 11 , wherein the first front side of the first semiconductor element is directly bonded to the second front side of the second semiconductor element without an adhesive.
13. The bonded structure of claim 11 , wherein the first dummy security circuit comprises active circuitry representative of security circuitry but that does not encrypt or decrypt data.
14. The bonded structure of claim 13 , wherein the first dummy security circuit is configured to switch randomly.
15. The bonded structure of claim 13 , wherein the first dummy security circuit is non-functional.
16. The bonded structure of claim 11 , further comprising a second dummy security circuit block in the second semiconductor element.
17. The bonded structure of claim 11 , further comprising a plurality of dummy security circuits blocks in at least one of the first and second semiconductor elements.
18. The bonded structure of claim 11 , further comprising active security circuitry in the first semiconductor element, the active security circuitry configured to encrypt or decrypt data.
19. The bonded structure of claim 18 , wherein the active security circuitry extends across the bond interface.
20. The bonded structure of claim 11 , further comprising a detection circuit in at least one of the first and second semiconductor elements, the detection circuit configured to determine whether a fault injection has occurred in the security circuitry.
21. The bonded structure of claim 20 , further comprising a response circuit configured to, in response to an alert signal from the detection circuit, deny electronic access to the first and second semiconductor elements.
22. A method of forming a bonded structure, the method comprising:
forming a first security circuit block in a first semiconductor element;
forming a second security circuit block in a second semiconductor element; and
directly bonding the first semiconductor element to the second semiconductor element without an adhesive such that the first and second security circuit blocks are electrically connected, the electrically connected first and second security blocks configured to prevent external access to at least some data or circuitry in at least one of the first and second semiconductor elements.
23. The method of claim 22 , further comprising directly bonding first conductive contact pads in electrical communication with the first security circuit block to second conductive contact pads in electrical communication with the second security block without an adhesive.
24. The method of claim 22 , further comprising forming a first dummy security circuit, the first dummy security circuit comprising active circuitry representative of security circuitry but that does not encrypt or decrypt data.
25. The method of claim 24 , further comprising forming a second dummy security circuit, the second dummy security circuit comprising active circuitry representative of security circuitry but that does not encrypt or decrypt data.
26. The method of claim 22 , further comprising forming a detection circuit in at least one of the first and second semiconductor elements, the detection circuit configured to determine whether a fault injection has been occurred in the security circuitry.
27. The bonded structure of claim 26 , further comprising forming a response circuit configured to, in response to an alert signal from the detection circuit, deny electronic access to the first and second semiconductor elements.