Granted Patent B2

US 12,626,046 · App. 18/110,335 · Granted May 12, 2026

Inventor: Akira Fujimura (Saratoga, CA)

Assignee: D2S, INC.

G06F30/394G06F30/3947G06F30/3953G06N3/08

Abstract

Claims (26)

1 . A method of designing an integrated circuit (IC), the method comprising:

using a first router to define a first plurality of curvilinear routes each of which traverses one or more routing layers in a first plurality of routing layers of the IC to connect at least two nodes of the IC, wherein in defining each curvilinear route the first router ensures that each curvilinear route that the first router defines is not longer than a threshold distance; and

using a second router to define a second plurality of preferred direction, rectilinear routes each of which traverses one or more routing layers in a second plurality of routing layers to connect at least two nodes of the IC.

2 . The method of claim 1 , wherein the second plurality of routing layers has at least first and second routing layers with first and second preferred routing directions respectively.

3 . The method of claim 2 , wherein each preferred routing direction is a horizontal direction or a vertical direction, and the preferred routing directions of different adjacent layers in the second plurality of layers alternate between horizontal and vertical directions.

4 . The method of claim 2 , wherein each preferred routing direction is a horizontal direction, a vertical direction, or a diagonal direction, and the preferred routing directions of different adjacent layers in the second plurality of layers alternate between horizontal, vertical and diagonal directions.

5 . The method of claim 2 , wherein a preferred routing direction on each layer in the second plurality of layers is the direction that includes at least a threshold percentage of the route segments on that layer.

6 . The method of claim 5 , wherein the threshold percentage is 90% or larger.

7 . The method of claim 1 , wherein:

the second plurality of rectilinear routes are for a first set of nets and each rectilinear route in the second plurality of rectilinear routes is longer than the threshold distance;

the method further comprises using the second router to define a third plurality of preferred direction, rectilinear routes for a second set of nets that comprise a plurality of nets each of which the first router could not connect through a route traversing the first plurality of routing layers; and

each of rectilinear route in the third plurality of rectilinear routes traverses one or more routing layers in the second plurality of routing layers to connect at least two nodes of the IC and is shorter than the threshold distance.

8 . The method of claim 1 , wherein the first router penalizes routes that are longer than the threshold distance to bias against defining routes longer than the threshold distance.

9 . The method of claim 1 , wherein the first router uses a constraint that prevents the routes defined by the first router from being longer than the threshold distance.

10 . The method of claim 1 further comprising using the first router to define a third plurality of rectilinear routes traversing the first plurality of routing layers to connect a third plurality of nodes of the IC.

11 . The method of claim 10 , wherein each rectilinear route traversing the first plurality of routing layers is not longer than the threshold distance.

12 . The method of claim 11 , wherein no route produced by the second router is a curvilinear route with at least one curvilinear segment.

13 . The method of claim 11 , wherein the nodes connected by each route include nodes on a substrate of the IC.

14 . The method of claim 1 , wherein the nodes connected by each route include at least one node on a routing layer of the IC.

15 . The method of claim 1 , wherein the first plurality of routing layers includes routing layers 3 and 4, and the second plurality of routing layers includes routing layers 5 and 6.

16 . The method of claim 1 , wherein the second plurality of routing layers includes routing layers 1 and 2.

17 . The method of claim 1 , wherein the first plurality of routing layers includes routing layers 1 and 2.

18 . The method of claim 17 , wherein the routing layers 1 and 2 each has a plurality of regions with preferred direction rectilinear routes for pre-defined IP (intellectual property) circuit blocks, and using the first router comprises using the first router to define a plurality of curvilinear route segments on the routing layers 1 and 2 between the regions with the preferred direction rectilinear routes for the IP circuit blocks.

19 . A non-transitory machine readable medium storing a program that when executed by at least one processing unit designs an integrated circuit (IC), the program comprising sets of instructions for:

using a first router to define a first plurality of curvilinear routes each of which traverses one or more routing layers in a first plurality of routing layers of the IC to connect at least two nodes of the IC, wherein in defining each curvilinear route the first router ensures that each curvilinear route that the first router defines is not longer than a threshold distance; and

using a second router to define a second plurality of preferred direction, rectilinear routes each of which traverses one or more routing layers in a second plurality of routing layers to connect at least two nodes of the IC.

Assignments (1)

Continuity (4)

References Cited (178)