Granted Patent B2

US 12,419,127 · App. 18/615,151 · Granted Sep 16, 2025

Inventors: Taku Umebayashi (Kanagawa, JP); Hiroshi Takahashi (Kanagawa, JP); Reijiroh Shohji (Nagasaki, JP)

Assignee: Sony Group Corporation

H10F39/809H01L21/76898H01L23/481H04N23/00H04N25/76H04N25/79H10F39/018H10F39/026H10F39/18H10F39/182H10F39/199H10F39/8037H10F39/8053H10F39/8063H10F39/811H01L2224/11

Abstract

Claims (30)

1. An image sensor, comprising:

a first semiconductor section including a first semiconductor substrate and a first wiring layer, the first semiconductor substrate including a photodiode, and the first wiring layer including a first insulating interlayer and first and second wirings; and

a second semiconductor section including a second semiconductor substrate and a second wiring layer, the second semiconductor section including a transistor, and the second wiring layer including a second insulating interlayer and third and fourth wirings,

wherein the first semiconductor section and the second semiconductor section are bonded together such that the first wiring layer and the third wiring layer face each other,

wherein the first wiring of the first wiring layer directly contacts the third wiring of the second wiring layer in a pixel region including the photodiode, and

wherein the second wiring of the first wiring layer directly contacts the fourth wiring of the second wiring layer in a peripheral region other than the pixel region.

2. The image sensor according to claim 1 , wherein a part of the first insulating interlayer and a part of the second insulating interlayer are in contact with each other.

3. The image sensor according to claim 1 , further comprising an isolation region separating unit pixels of the pixel region from one another.

4. The image sensor according to claim 1 , wherein the second semiconductor section further includes a fifth wiring.

5. The image sensor according to claim 1 , wherein the third wiring is electrically connected to the transistor via a fifth wiring.

6. The image sensor according to claim 1 , further comprising a through connection conductor that penetrates the second semiconductor substrate, and that is electrically connected to a fifth wiring.

7. The image sensor according to claim 1 , further comprising a light-shielding layer formed at a light incident side of the first semiconductor section in the peripheral region.

8. The image sensor according to claim 7 , wherein the light-shielding layer overlaps at least a part of the second wiring of the first wiring layer and the fourth wiring of the second wiring layer.

9. The image sensor according to claim 7 , wherein the light-shielding layer includes metal.

10. The image sensor according to claim 9 , wherein the metal is tungsten.

11. The image sensor according to claim 7 , wherein the light-shielding layer is electrically connected to the first semiconductor substrate.

12. The image sensor according to claim 11 , wherein the light-shielding layer is provided with a ground potential from the first semiconductor substrate.

13. The image sensor according to claim 11 , wherein a contact area where the light-shielding layer contacts the first semiconductor substrate overlaps a contact area where a portion of the second wiring of the first wiring layer contacts a portion of the fourth wiring of the second wiring layer in the peripheral region.

14. The image sensor according to claim 1 , wherein the first and the second wiring layers include copper (Cu).

15. An image sensing method, comprising:

providing a first semiconductor section including a first semiconductor substrate and a first wiring layer, the first semiconductor substrate including a photodiode, and the first wiring layer including a first insulating interlayer and first and second wirings;

providing a second semiconductor section including a second semiconductor substrate and a second wiring layer, the second semiconductor section including a transistor, and the second wiring layer including a second insulating interlayer and third and fourth wirings; and

bonding the first semiconductor section and the second semiconductor section together such that the first wiring layer and the third wiring layer face each other,

wherein the first wiring of the first wiring layer directly contacts the third wiring of the second wiring layer in a pixel region including the photodiode, and

wherein the second wiring of the first wiring layer directly contacts the fourth wiring of the second wiring layer in a peripheral region other than the pixel region.

16. The method according to claim 15 , wherein a part of the first insulating interlayer and a part of the second insulating interlayer are in contact with each other.

17. The method according to claim 15 , further comprising providing an isolation region separating unit pixels of the pixel region from one another.

18. The method according to claim 15 , wherein the second semiconductor section further includes a fifth wiring.

19. The method according to claim 15 , wherein the third wiring is electrically connected to the transistor via a fifth wiring.

20. The method according to claim 15 , further comprising providing a through connection conductor that penetrates the second semiconductor substrate, and that is electrically connected to a fifth wiring.

Assignments (3)

Priority Claims (2)

Continuity (11)

References Cited (175)