Granted Patent B2

US 12,674,948 · App. 19/285,279 · Granted Jul 7, 2026

Inventors: Philip Winterbottom (San Jose, CA); David Lazovsky (Los Gatos, CA); Ankur Aggarwal (Pleasanton, CA); Martinus Bos (San Jose, CA); Subal Sahni (La Jolla, CA)

Assignee: Sicily Merger Sub II, Inc.

G02B6/4295G01K7/023G01K7/028G01K7/14G02B6/4246G02B6/428G02B6/43G02F1/0113G02F1/0123G02F1/0157G02B6/4245

Abstract

Claims (29)

1 . A package, comprising:

a package substrate;

a bridging element disposed in the package substrate, the bridging element providing an optical bridge to a die;

an analog/mixed signal (AMS) block coupled to the bridging element, the AMS block implementing data serialization and deserialization interfaces between the die and the bridging element;

a photonic network, disposed in the bridging element, comprising a plurality of photonic paths;

one or more modulators disposed in the bridging element, the one or more modulators being optically coupled to the photonic network and electrically coupled to the AMS block;

one or more photodetectors disposed in the bridging element, the one or more photodetectors being optically coupled to the photonic network and electrically coupled to the AMS block;

a multiplexer disposed in the bridging element, the multiplexer being optically coupled through the photonic network to the one or more modulators, and further optically coupled through the photonic network to an optical interface, wherein the multiplexer is configured to multiplex a first plurality of individual signals, received from the one or more modulators, into a first set of data channels that are transmitted over a first photonic path to the optical interface, wherein each data channel in the first set of data channels is defined by a unique wavelength; and

a demultiplexer disposed in the bridging element, the demultiplexer being optically coupled through the photonic network to the one or more photodetectors, and further optically coupled through the photonic network to the optical interface, wherein the demultiplexer is configured to demultiplex a multiplexed signal received from the optical interface over a second photonic path, the multiplexed signal comprising a second set of data channels, wherein the demultiplexer demultiplexes the multiplexed signal into a second plurality of individual signals that is transmitted over the photonic network to the one or more photodetectors, wherein each data channel in the second set of data channels is defined by a unique wavelength, wherein

a distance between the AMS block and the bridging element is smaller than 50 um.

2 . The package of claim 1 , wherein the AMS block comprises a serializer and a deserializer, each of the serializer and deserializer being coupled to the die through a digital interface.

3 . The package of claim 1 , wherein the digital interface comprises one of UCIe (Universal Chiplet Interconnect Express) or PCIe (Peripheral Component Interconnect Express).

4 . The package of claim 3 , wherein the digital interface comprises an electrical path that is at least partially disposed in the AMS block or the bridging element.

5 . The package of claim 1 , wherein the optical interface comprises one of an edge coupler, a grating coupler, a graded index lens coupler, a fiber Bragg grating coupler, a micro-lens array coupler, an evanescent wave coupler, an adiabatic coupler, a wavelength division multiplexing coupler, a prism coupler, a butt coupler, an end-fire coupler, or a V-groove coupler.

6 . The package of claim 5 , wherein the optical interface further comprises a fiber array unit optically coupled to the grating coupler.

7 . The package of claim 5 , wherein the optical interface provides an optical connection to an external device.

8 . The package of claim 7 , wherein the external device comprises one of a light engine or an electrical device.

9 . The package of claim 1 , wherein the bridging element further comprises a redistribution layer.

10 . The package of claim 9 , wherein the redistribution layer comprises one or more of electrical interconnects or through-glass vias between the die and the bridging element.

11 . The package of claim 1 , wherein the AMS block is aligned with the die such that the data serialization and deserialization interfaces are accessible by compute elements or memory regions disposed in central regions of the die.

12 . The package of claim 1 , wherein the package substrate comprises one of a printed circuit board, an interposer, or a motherboard.

13 . The package of claim 1 , wherein the central region of the die is less than 2 mm from the AMS block.

14 . The package of claim 1 , wherein the one or more modulators comprise one of a Mach-Zehnder interferometer, electro-absorption modulator, or a ring modulator.

15 . The package of claim 1 , wherein the one or more modulators are configured to modulate using one of a non-return-to-zero or a pulse amplitude modulation scheme.

16 . The package of claim 1 , wherein the AMS block further comprises a modulator driver.

17 . The package of claim 1 , wherein the AMS block further comprises a transmit bonding engine and a receive bonding engine.

18 . The package of claim 1 , wherein the AMS block further comprises a transimpedance amplifier.

19 . The package of claim 1 , wherein the AMS block further comprises a slicer.

20 . The package of claim 1 , wherein the AMS block further comprises a gain control.

Assignments (2)

Continuity (10)

References Cited (400)