IP Library › Granted Patent US 12,262,647
Granted Patent B2
US 12,262,647 · App. 18/592,553 · Granted Mar 25, 2025

Semiconductor device and method for fabricating the same

Inventors: Hui-Lin Wang (Taipei, TW); Chen-Yi Weng (New Taipei, TW); Yi-Wei Tseng (New Taipei, TW); Chin-Yang Hsieh (Tainan, TW); Jing-Yin Jhang (Tainan, TW); Yi-Hui Lee (Taipei, TW); Ying-Cheng Liu (Tainan, TW); Yi-An Shih (Changhua County, TW); I-Ming Tseng (Kaohsiung, TW); Yu-Ping Wang (Hsinchu, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H10N50/80G11C5/06G11C11/16G11C11/161H01L29/82H10N50/01H10N50/10G11C2211/5615H10B61/00
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Quick Facts
Patent No.
US 12,262,647
App. No.
18/592,553
Granted
Mar 25, 2025
Kind
B2
Abstract

A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a spacer adjacent to the MTJ, a liner adjacent to the spacer, and a first metal interconnection on the MTJ. Preferably, the first metal interconnection includes protrusions adjacent to two sides of the MTJ and a bottom surface of the protrusions contact the liner directly.

Claims (12)

1. A semiconductor device, comprising:

a magnetic tunneling junction (MTJ) on a substrate, wherein a top surface of the MTJ comprises a reverse V-shape;

a spacer adjacent to and directly contacting the MTJ;

a liner adjacent to the spacer; and

a first metal interconnection on the MTJ, wherein the first metal interconnection comprises protrusions adjacent to two sides of the MTJ, a bottom surface of the protrusions contact the liner directly, and a width of the spacer directly contacting the protrusions is less than a width of the liner directly contacting the protrusions.

2. The semiconductor device of claim 1 , further comprising:

a first inter-metal dielectric (IMD) layer around the liner;

a second metal interconnection under the MTJ; and

a second IMD layer around the second metal interconnection.

3. The semiconductor device of claim 1 , wherein a bottom surface of the first metal interconnection comprises a reverse V-shape.

4. The semiconductor device of claim 1 , wherein a sidewall of the first metal interconnection is extended to directly connect a sidewall of the liner.

5. The semiconductor device of claim 1 , wherein a bottom surface of the protrusions contact the spacer directly.

Priority Claims (1)
CN 201910418706.2 · May 20, 2019 · national
Continuity (4)
Continuation 17967904 · Oct 18, 2022
Continuation 17308057 · May 5, 2021
Division 16438480 · Jun 12, 2019
Related Publication 20240260481A1 · Aug 1, 2024
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