Three-dimensional memory device containing etch-stop structures and self-aligned insulating spacers and method of making the same
Contact via openings are formed through a retro-stepped dielectric material portion in a three-dimensional memory device to underlying etch stop structures. The etch stop structures may include a stepped conductive or semiconductor etch stop plate overlying stepped surfaces in the staircase region. The contact via openings are extended through the etch stop structures. Alternatively, electrically conductive layers, including a topmost dummy electrically conductive layer in the staircase region, may be employed as etch stop structures. In this case, the contact via openings can be extended through the electrically conductive layers. Insulating spacers are formed at peripheral regions of the extended contact via openings. Contact via structures surrounded by the insulating spacers are formed in the extended contact via openings to a respective underlying electrically conductive layer.
1. A three-dimensional memory device, comprising:
an alternating stack of insulating layers and electrically conductive layers located over a substrate, wherein the alternating stack comprises a staircase region in which lateral extents of the electrically conductive layers decrease with a vertical distance from the substrate;
a retro-stepped dielectric material portion overlying the staircase region of the alternating stack;
memory stack structures vertically extending through the alternating stack, wherein each of the memory stack structures comprises a respective vertical semiconductor channel and a respective memory film;
an electrically conductive or semiconductor perforated etch stop plate interposed between the alternating stack and a stepped bottom surface of the retro-stepped dielectric material portion; and
laterally-insulated contact structures vertically extending through the retro-stepped dielectric material portion and through a respective one of perforation openings in the perforated etch stop plate, wherein each of the laterally-insulated contact structures comprises an assembly of a contact via structure contacting a top surface of a respective one of the electrically conductive layers and an insulating spacer laterally surrounding the contact via structure and contacting the perforated etch stop plate,
wherein the insulating spacer of each of the laterally-insulated contact structures comprises:
a tubular insulating portion including a vertically-extending outer sidewall segment in contact with the retro-stepped dielectric material portion; and
a laterally-bulging insulating portion adjoined to a bottom of the tubular insulating portion and laterally protruding outward from a vertical plane including the vertically-extending outer sidewall segment,
wherein a surface segment of the laterally-bulging insulating portion contacts a surface segment of a horizontal portion of the perforated etch stop plate for at least one of the laterally-insulated contact structures.
2. The three-dimensional memory device of claim 1 , wherein the surface segment of the laterally-bulging insulating portion comprises a convex tapered surface segment, and the surface segment of the horizontal portion of the etch stop plate comprises a concave tapered surface segment of the horizontal portion of the perforated etch stop plate.
3. The three-dimensional memory device of claim 1 , wherein the laterally-bulging insulating portion comprises a planar top surface having an inner periphery adjoined to a bottom periphery of the vertically-extending outer sidewall segment, and a planar bottom surface having an inner periphery that contacts the contact via structure and having an outer periphery that is adjoined to a bottom periphery of the respective opening through the electrically conductive or semiconductor perforated etch stop plate.
4. The three-dimensional memory device of claim 1 , wherein the perforated etch stop plate comprises the electrically conductive perforated metal plate comprising a same one or more materials as the electrically conductive layers.
5. The three-dimensional memory device of claim 4 , wherein:
each of the electrically conductive layers is spaced from the memory stack structures and the insulating layers by a backside blocking dielectric layer; and
the perforated etch stop plate is encased within an encasing dielectric liner having a same material composition and a same thickness as the backside blocking dielectric layer.
6. The three-dimensional memory device of claim 5 , wherein the laterally-bulging insulating portion that has:
a planar annular top surface that contacts a surface segment of the encasing dielectric liner; and
a planar annular bottom surface that contacts another surface segment of the encasing dielectric liner.
7. The three-dimensional memory device of claim 1 , wherein the perforated etch stop plate comprises the semiconductor perforated plate.
8. The three-dimensional memory device of claim 1 , further comprising a perforated insulating plate interposed between the alternating stack and the perforated etch stop plate.
9. The three-dimensional memory device of claim 8 , wherein each of the contact via structure extends through and contacts a sidewall of a respective perforation opening in the perforated insulating plate.
10. The three-dimensional memory device of claim 8 , wherein the perforated insulating plate comprises:
horizontally-extending portions including perforation openings therethrough; and
vertically extending portions that contact sidewalls of the insulating layers and connecting neighboring pairs among the horizontally-extending portions, wherein the vertically extending portions are vertically offset from each other.
11. The three-dimensional memory device of claim 8 , wherein each of the insulating spacers of the laterally-insulated contact structures comprises a respective annular surface that contacts a respective surface segment of the perforated insulating plate.
12. The three-dimensional memory device of claim 1 , further comprising a pair of backside trench fill structures laterally extending along a first horizontal direction and laterally spaced apart along a second horizontal direction, wherein:
each of the backside trench fill structures contacts each of the insulating layers and the electrically conductive layers at a respective lengthwise sidewall that laterally extends along the first horizontal direction; and
the perforated etch stop plate contacts the lengthwise sidewalls of the pair of backside trench fill structures.
13. The three-dimensional memory device of claim 1 , wherein:
the respective memory film comprises a respective blocking dielectric layer, a respective vertical stack of memory elements located at levels of the electrically conductive layers, and a respective tunneling dielectric layer that contacts the respective vertical semiconductor channel;
the electrically conductive layers comprise word lines; and
the contact via structures comprise word-line contact via structures of the three-dimensional memory device.
14. The three-dimensional memory device of claim 1 , wherein for each of the laterally-insulated contact structures, an entirety of a contact area between the laterally-bulging insulating portion and the electrically conductive or semiconductor perforated etch stop plate is laterally offset outward from a cylindrical vertical plane containing the vertically-extending outer sidewall segment of the tubular insulating portion.
15. The three-dimensional memory device of claim 14 , wherein for each of the laterally-insulated contact structures, the laterally-bulging insulating portion comprises:
a planar top surface;
a planar bottom surface; and
a sidewall surface that connects the planar top surface and the planar bottom surface, wherein an entirety of the sidewall surface is in direct contact with the electrically conductive or semiconductor perforated etch stop plate.
16. The three-dimensional memory device of claim 15 , wherein the sidewall surface comprises a convex tapered surface segment that contacts a concave tapered surface segment of the perforated etch stop plate for at least one of the laterally-insulated contact structures.
17. The three-dimensional memory device of claim 15 , wherein the planar top surface has an inner periphery adjoined to a bottom periphery of the vertically-extending outer sidewall segment.
18. The three-dimensional memory device of claim 14 , wherein for each of the laterally-insulated contact structures, the laterally-bulging insulating portion comprises:
a planar top surface having an inner periphery that coincides with a bottom periphery of the vertically-extending outer surface segment and having an outer periphery segment that coincides with a top periphery of a respective opening through the electrically conductive or semiconductor perforated etch stop plate; and
a planar bottom surface having an inner periphery that contacts the contact via structure and having an outer periphery that coincides with a bottom periphery of the respective opening through the electrically conductive or semiconductor perforated etch stop plate.
19. The three-dimensional memory device of claim 14 , wherein:
each of the electrically conductive layers is encapsulated by, and is contacted by, a respective backside blocking dielectric layer except in regions contacted by a respective one of the contact via structures;
the perforated etch stop plate is encased within an encasing dielectric liner having a same material composition and a same thickness as the backside blocking dielectric layer;
each of the contact via structures is contacted by a horizontally-extending portion of the encasing dielectric liner and by a horizontally-extending portion of a respective one of the backside blocking dielectric layers; and
a stepped insulating layer having a continuously extending interface with the encasing dielectric liner which continuously extends from a horizontal plane including a bottommost surface of the alternating stack to a horizontal plane including a topmost surface of the alternating stack, and contacting each of the backside blocking dielectric layers.
20. The three-dimensional memory device of claim 1 , wherein:
each of the electrically conductive layers is encapsulated by, and is contacted by, a respective backside blocking dielectric layer except in regions contacted by a respective one of the contact via structures;
the perforated etch stop plate is encased within an encasing dielectric liner having a same material composition and a same thickness as the backside blocking dielectric layer;
each of the contact via structures is contacted by a horizontally-extending portion of the encasing dielectric liner and by a horizontally-extending portion of a respective one of the backside blocking dielectric layers; and
a stepped insulating layer having a continuously extending interface with the encasing dielectric liner which continuously extends from a horizontal plane including a bottommost surface of the alternating stack to a horizontal plane including a topmost surface of the alternating stack, and contacting each of the backside blocking dielectric layers.