IP Library › Granted Patent US 12,490,457
Granted Patent B2
US 12,490,457 · App. 18/780,607 · Granted Dec 2, 2025

Semiconductor device including end insulating layer

Inventor: Akihiro Hikasa (Kyoto, JP)
Assignee: ROHM CO., LTD.
H10D30/669H10D8/00H10D62/126H10D64/252H10D64/519H10D30/63H10D62/8325
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Quick Facts
Patent No.
US 12,490,457
App. No.
18/780,607
Granted
Dec 2, 2025
Kind
B2
Abstract

The semiconductor device includes a semiconductor layer which has a main surface, a switching device which is formed in the semiconductor layer, a first electrode which is arranged on the main surface and electrically connected to the switching device, a second electrode which is arranged on the main surface at an interval from the first electrode and electrically connected to the switching device, a first terminal electrode which has a portion that overlaps the first electrode in plan view and a portion that overlaps the second electrode and is electrically connected to the first electrode, and a second terminal electrode which has a portion that overlaps the second electrode in plan view and is electrically connected to the second electrode.

Claims (99)

1 . A semiconductor device comprising:

a semiconductor layer that has a main surface, and that has an active region and a non-active region provided in a region outside the active region;

a switching element that is formed in the active region of the semiconductor layer, and that has a gate electrode, a source region, and a drain region;

a first electrode that is arranged on the main surface at the non-active region, and that is electrically connected to the gate electrode of the switching element;

a first insulating layer that has contact holes at the active region;

a second electrode that is arranged on the main surface via the first insulating layer at an interval from the first electrode at the active region as viewed in plan, and that is electrically connected to the source region of the switching element;

a second insulating layer that is arranged on the second electrode;

a first terminal electrode that has a portion overlapping the first electrode and a portion overlapping the second electrode as viewed in plan, that is electrically connected to the first electrode, and that is electrically isolated from the second electrode with the second insulating layer;

a second terminal electrode that has a portion overlapping the second electrode as viewed in plan, and that is electrically connected to the second electrode; and

an end insulating layer that covers a portion of the semiconductor layer at an outer peripheral portion of the semiconductor layer.

2 . The semiconductor device according to claim 1 ,

wherein the semiconductor layer includes SiC.

3 . The semiconductor device according to claim 1 ,

wherein the first insulating layer covers the outer peripheral portion of the semiconductor layer, and

the end insulating layer covers the semiconductor layer via the first insulating layer at the outer peripheral portion of the semiconductor layer.

4 . The semiconductor device according to claim 1 ,

wherein the first terminal electrode includes:

a connecting portion that is formed in a through hole formed in the second insulating layer, and that is connected to the first electrode; and

a wide portion that extends to an outside from the connecting portion; and

wherein the connecting portion and the wide portion are formed of a same conductive material.

5 . The semiconductor device according to claim 4 ,

wherein the first terminal electrode is recessed toward the first electrode at a portion overlapping the connecting portion.

6 . The semiconductor device according to claim 4 ,

wherein the first terminal electrode has an area of not less than 640000 μm 2 and not more than 1000000 μm 2 .

7 . The semiconductor device according to claim 1 , further comprising:

a bonding wire that is bonded to the first terminal electrode;

wherein the first terminal electrode includes:

a connecting portion that is formed in a through hole formed in the second insulating layer, and that is connected to the first electrode; and

a wide portion that extends to an outside from the connecting portion; and

wherein the bonding wire is bonded to a region that does not overlap the connecting portion as viewed in plan.

8 . The semiconductor device according to claim 1 ,

wherein the second electrode has a first portion that is embedded in the contact hole of the first insulating layer and a second portion that is formed on the first insulating layer,

the first portion includes tungsten or tungsten alloy, and

the second portion includes aluminum or aluminum alloy.

9 . The semiconductor device according to claim 8 ,

wherein the first portion is formed via a barrier film made of titanium or titanium nitride.

10 . The semiconductor device according to claim 1 ,

wherein the first terminal electrode has a side surface that is arranged at an upper side to the second electrode so as to face the second electrode across the second insulating layer, and

the second terminal electrode has a side surface that is arranged at an upper side to the second electrode so as to face the second electrode across the second insulating layer, and that forms a gap exposing the second insulating layer in a region between the side surface of the first terminal electrode and the side surface of the second terminal electrode.

11 . The semiconductor device according to claim 10 , further comprising:

a third insulating layer that covers the second insulating layer inside the gap and faces the second electrode across the second insulating layer.

12 . The semiconductor device according to claim 11 ,

wherein the first insulating layer covers the outer peripheral portion of the semiconductor layer,

the end insulating layer covers the semiconductor layer via the first insulating layer at the outer peripheral portion of the semiconductor layer, and

the third insulating layer covers the semiconductor layer via the first insulating layer and the end insulating layer at the outer peripheral portion of the semiconductor layer.

13 . The semiconductor device according to claim 1 ,

wherein the first electrode includes:

an electricity receiving portion that is arranged so as to overlap the first terminal electrode as viewed in plan, and that is electrically connected to the first terminal electrode;

an electricity supplying portion that extends along one direction as viewed in plan; and

a connecting portion that connects the electricity receiving portion and the electricity supplying portion, and that extends along a direction orthogonal to the one direction.

14 . The semiconductor device according to claim 13 , further comprising:

a gate finger portion that is connected to the gate electrode of the switching element, and that has a portion overlapping the electricity supplying portion;

wherein the electricity supplying portion is electrically connected to the gate finger portion via a through hole provided in the first insulating layer.

15 . The semiconductor device according to claim 1 , further comprising:

a metal plate that is electrically connected to the second terminal electrode; and

a bonding material that is interposed between the second terminal electrode and the metal plate;

wherein a first plating layer is formed on an upper surface of the second terminal electrode, and

the first plating layer and the metal plate are bonded with the bonding material.

16 . The semiconductor device according to claim 15 ,

wherein the first plating layer includes a metal layer including nickel as a main component.

17 . The semiconductor device according to claim 16 ,

wherein a second plating layer is formed on an upper surface of the first terminal electrode.

18 . The semiconductor device according to claim 1 ,

wherein the end insulating layer is formed of a same insulating material as the second insulating layer.

19 . The semiconductor device according to claim 1 , wherein the second electrode is arranged in such a manner as to surround a periphery of the first electrode as viewed in plan.

20 . The semiconductor device according to claim 1 , wherein the second terminal electrode is arranged such as to surround a periphery of the first terminal electrode.

21 . A semiconductor device comprising:

a semiconductor layer that has a main surface, and that has an active region and a non-active region provided in a region outside the active region;

a switching element that is formed in the active region of the semiconductor layer, and that has a gate electrode, a source region, and a drain region;

a first electrode that is arranged on the main surface at the non-active region, and that is electrically connected to the gate electrode of the switching element;

a first insulating layer that has contact holes at the active region;

a second electrode that is arranged on the main surface via the first insulating layer at an interval from the first electrode at the active region as viewed in plan, and that is electrically connected to the source region of the switching element;

a second insulating layer that is arranged on the second electrode;

a first terminal electrode that has a portion overlapping the first electrode and a portion overlapping the second electrode as viewed in plan, that is electrically connected to the first electrode, and that is electrically isolated from the second electrode with the second insulating layer;

a second terminal electrode that has a portion overlapping the second electrode as viewed in plan, and that is electrically connected to the second electrode; and

an end insulating layer that covers a portion of the semiconductor layer at an outer peripheral portion of the semiconductor layer;

wherein the first insulating layer covers the outer peripheral portion of the semiconductor layer,

the end insulating layer covers the portion of the semiconductor layer via the first insulating layer at the outer peripheral portion of the semiconductor layer, and

the semiconductor layer includes SiC.

22 . The semiconductor device according to claim 21 ,

wherein the first terminal electrode has a side surface that is arranged at an upper side to the second electrode so as to face the second electrode across the second insulating layer, and

the second terminal electrode has a side surface that is arranged at an upper side to the second electrode so as to face the second electrode across the second insulating layer, and that forms a gap exposing the second insulating layer in a region between the side surface of the first terminal electrode and the side surface of the second terminal electrode.

23 . The semiconductor device according to claim 22 , further comprising:

a third insulating layer that covers the second insulating layer inside the gap and faces the second electrode across the second insulating layer.

24 . The semiconductor device according to claim 23 ,

wherein the third insulating layer covers the semiconductor layer via the first insulating layer and the end insulating layer at the outer peripheral portion of the semiconductor layer.

25 . The semiconductor device according to claim 21 , further comprising:

a metal plate that is electrically connected to the second terminal electrode; and

a bonding material that is interposed between the second terminal electrode and the metal plate;

wherein a first plating layer is formed on an upper surface of the second terminal electrode, and

the first plating layer and the metal plate are bonded with the bonding material.

26 . The semiconductor device according to claim 25 ,

wherein the first plating layer includes a metal layer including nickel as a main component.

27 . The semiconductor device according to claim 26 ,

wherein a second plating layer is formed on an upper surface of the first terminal electrode.

28 . The semiconductor device according to claim 21 ,

wherein the end insulating layer is formed of a same insulating material as the second insulating layer.

29 . The semiconductor device according to claim 21 , wherein the second electrode is arranged in such a manner as to surround a periphery of the first electrode as viewed in plan.

30 . The semiconductor device according to claim 21 , wherein the second terminal electrode is arranged such as to surround a periphery of the first terminal electrode.

Priority Claims (1)
JP 2020-156343 · Sep 17, 2020 · national
Continuity (2)
Continuation 18009996
Related Publication 20240379840A1 · Nov 14, 2024
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