Semiconductor device and method for fabricating the same
A semiconductor device includes a gate structure on a substrate, an offset spacer adjacent to the gate structure, a main spacer around the offset spacer, a source/drain region adjacent to two sides of the main spacer, a contact etch stop layer (CESL) adjacent to the main spacer, and an interlayer dielectric (ILD) layer around the CESL. Preferably, a dielectric constant of the offset spacer is higher than a dielectric constant of the main spacer.
1 . A semiconductor device, comprising:
a gate structure on a substrate;
a spacer around the gate structure;
a contact etch stop layer (CESL) adjacent to the spacer; and
an interlayer dielectric (ILD) layer around the CESL, wherein the CESL and the ILD layer comprise different material and a same dielectric constant.
2 . The semiconductor device of claim 1 , wherein the oxygen concentration on a surface of the CESL is greater than the oxygen concentration in the CESL.
3 . The semiconductor device of claim 1 , wherein the spacer comprises an offset spacer and a main spacer.
4 . The semiconductor device of claim 3 , wherein the main spacer, the CESL and the ILD layer comprise a same dielectric constant.
5 . The semiconductor device of claim 3 , wherein the main spacer and the CESL comprise a same material.