Granted Patent B2

US 12,531,210 · App. 15/733,766 · Granted Jan 20, 2026

Inventors: Anand Chandrashekar (Fremont, CA); Eric H. Lenz (Livermore, CA); Leonard Wai Fung Kho (San Francisco, CA); Jeffrey Charles Clevenger (Fremont, CA); In Su Ha (Fremont, CA)

Assignee: Lam Research Corporation

H01J37/32449H01J37/32642H01J37/32715H01L21/02175H01L21/02186H01L21/68721H01L21/68735H01J2237/332

Abstract

Claims (47)

1 . An apparatus comprising:

a semiconductor processing chamber having:

an exclusion ring assembly configured for use in processing of a semiconductor wafer of nominal diameter D, the exclusion ring assembly comprising:

an upper annular ring having an inner diameter smaller than D and an outer diameter, and

a lower annular ring having an inner diameter smaller than D and an outer diameter, wherein the upper annular ring is disposed over the lower annular ring to define an annular gas flow passage between the upper annular ring and the lower annular ring,

a pedestal having a top surface configured to support the semiconductor wafer, and

a showerhead disposed over the pedestal and configured to flow a process gas onto the semiconductor wafer supported by the pedestal; and

a gas source fluidically connected to the showerhead and configured to flow the process gas to the showerhead; wherein:

the apparatus is configured to apply a vacuum to the annular gas flow passage,

the upper and lower annular rings are disposed over an outer edge of the semiconductor wafer,

the exclusion ring assembly has an innermost axisymmetric opening extending circumferentially around a center axis of the exclusion ring assembly,

the upper annular ring has a first innermost axisymmetric surface and a bottom frustoconical surface that intersects with the first innermost axisymmetric surface to form a first edge,

the lower annular ring has a second innermost axisymmetric surface and a top frustoconical surface that faces the bottom frustoconical surface of the upper annular ring and that intersects with the second innermost axisymmetric surface to form a second edge,

the first edge and the second edge define the innermost axisymmetric opening of the exclusion ring assembly, the annular gas flow passage terminates at the innermost opening such that the innermost axisymmetric opening forms an opening of the annular gas flow passage,

the innermost axisymmetric opening is oriented at an acute angle or an obtuse angle with respect to the center axis of the exclusion ring assembly, and

the annular gas flow passage and the pedestal are configured such that the vacuum applied to the annular gas flow passage while the process gas is flowed onto the semiconductor wafer causes the process gas to flow through the innermost axisymmetric opening and into the annular gas flow passage.

2 . The apparatus of claim 1 , wherein the annular gas flow passage has an inner diameter, and an outer diameter, and a width defined by a gap between the upper annular ring and the lower annular ring, and wherein the width at the inner diameter of the annular gas flow passage is less than the width at the outer diameter of the annular gas flow passage.

3 . The apparatus of claim 1 , wherein a gap between the upper annular ring and the lower annular ring at the inner diameter of the lower annular ring is smaller than the gap between the upper annular ring and the lower annular ring at the outer diameter of the lower annular ring.

4 . The apparatus of claim 1 , wherein a gap between the upper annular ring and the lower annular ring at the inner diameter of the lower annular ring is no more than 0.1 inch.

5 . The apparatus of claim 1 , wherein the inner diameter of the upper annular ring is smaller than the inner diameter of the lower annular ring.

6 . The apparatus of claim 1 , wherein the apparatus is without structures between the innermost axisymmetric opening and the center axis of the exclusion ring assembly.

7 . The apparatus of claim 1 , wherein the upper annular ring further comprises:

an upper frustoconical surface that intersects with the first innermost axisymmetric surface to form a third edge, and

an annular top surface that intersects with the upper frustoconical and that is substantially parallel to a reference plane perpendicular to the center axis of the exclusion ring assembly.

8 . The apparatus of claim 7 , wherein the lower annular ring comprises a top surface that intersects with the top frustoconical surface and that is substantially parallel to the reference plane.

9 . The apparatus of claim 1 , wherein the second edge is radially outwards of the first edge with respect to the center axis of the exclusion ring assembly.

10 . The apparatus of claim 1 , wherein the apparatus is configured such that gas flows from the substrate and enters the annular gas flow passage through the innermost opening without flowing through another structure.

11 . The apparatus of claim 1 , wherein the pedestal further comprises a gas injector configured to inject gas at an edge region of the semiconductor wafer.

12 . The apparatus of claim 1 , wherein the pedestal further comprises a recess in the top surface defining a gas passage.

13 . The apparatus of claim 1 , wherein the first innermost axisymmetric surface and the second innermost axisymmetric surface are parallel to the center axis.

14 . An apparatus comprising:

a deposition chamber including:

a pedestal comprising a top surface and an annular recess in the top surface configured to be fluidically connected to a backside gas source;

an exclusion ring assembly installed on the pedestal, wherein the exclusion ring assembly comprises an upper annular ring having an inner diameter and an outer diameter and a lower annular ring having an inner diameter and an outer diameter, wherein the upper annular ring is disposed over the lower annular ring to define a lower annular gas flow passage between the upper annular ring and the lower annular ring; and

a showerhead disposed over the pedestal and exclusion ring assembly to define an upper annular gas flow passage between the showerhead and the upper annular ring;

wherein:

the upper and lower annular rings are disposed over an outer edge of a substrate positioned on the pedestal,

the pedestal and the exclusion ring assembly are capable of being raised to decrease the size of the upper annular gas flow passage,

the pedestal and the exclusion ring assembly are further capable of being lowered to increase the size of the upper annular gas flow passage, so as to provide control over the processing gas concentration,

the exclusion ring assembly has an innermost axisymmetric opening extending circumferentially around a center axis of the exclusion ring assembly, the upper annular ring has a first innermost axisymmetric surface and a bottom frustoconical surface that intersects with the first innermost axisymmetric surface to form a first edge,

the lower annular ring has a second innermost axisymmetric surface and a top frustoconical surface that faces the bottom frustoconical surface of the upper annular ring and that intersects with the second innermost axisymmetric surface to form a second edge,

the first edge and the second edge define the innermost axisymmetric opening of the exclusion ring assembly, the annular gas flow passage terminates at the innermost opening such that the innermost axisymmetric opening forms an opening of the annular gas flow passage, and the innermost axisymmetric opening is oriented at an acute angle or an obtuse angle with respect to the center axis of the exclusion ring assembly.

15 . The apparatus of claim 1 , further comprising a controller configured to cause:

the process gas to flow to the showerhead and onto the semiconductor wafer, and

the vacuum to be applied to the annular gas flow passage while the process gas is flowed onto the semiconductor wafer.

16 . The apparatus of claim 1 , wherein the vacuum is an outward radial vacuum.

17 . The apparatus of claim 1 , wherein the apparatus is without structures between the innermost axisymmetric opening and the center axis of the exclusion ring assembly.

Assignments (1)

Continuity (2)

References Cited (293)

Cited By (1)

US 12,665,171