Wide range full-scale current configurable current-steering digital-to-analog converter (DAC)
Certain aspects of the present disclosure are directed towards a DAC comprising a plurality of DAC cells, wherein each of the DAC cells comprises: a first current source coupled to an output of the DAC cell; a second current source coupled to the output of the DAC cell; a resistive network including a plurality of resistive elements coupled between a voltage rail and the first current source, wherein the resistive network is coupled to the first current source and the second current source; and a plurality of switches coupled between the voltage rail and respective nodes of the resistive network.
1 . A digital-to-analog converter (DAC) comprising a plurality of DAC cells, wherein at least one of the DAC cells comprises:
a first current source coupled to an output of the DAC cell, wherein a control input of the first current source is coupled to a first bias node of the DAC;
a second current source coupled to the output of the DAC cell, wherein a control input of the second current source is coupled to a second bias node of the DAC, the second bias node being different than the first bias node;
a resistive network including a plurality of resistive elements coupled between a voltage rail and the first current source, wherein the resistive network is coupled to the first current source and the second current source; and
a plurality of switches coupled between the voltage rail and nodes of the resistive network.
2 . The DAC of claim 1 , wherein:
the plurality of resistive elements includes a first resistive element, a second resistive element, a third resistive element, and a fourth resistive element;
the second resistive element is coupled between the first resistive element and the third resistive element; and
the third resistive element is coupled between the second resistive element and the fourth resistive element.
3 . The DAC of claim 2 , wherein the plurality of switches includes:
a first switch coupled between the voltage rail and the first resistive element of the plurality of resistive elements;
a second switch coupled between the voltage rail and a node between the third resistive element and the fourth resistive element; and
a third switch coupled between the voltage rail and a node between the second resistive element and the third resistive element.
4 . The DAC of claim 2 , wherein the first current source is coupled between the fourth resistive element and the output of the DAC cell, and wherein the second current source is coupled between the output of the DAC cell and a node between the second resistive element and the third resistive element.
5 . The DAC of claim 2 , wherein the plurality of switches includes:
a first switch coupled between the voltage rail and the first resistive element of the plurality of resistive elements;
a second switch coupled between the voltage rail and a node between the third resistive element and the fourth resistive element; and
a third switch coupled between the first current source and a node between the second resistive element and the third resistive element.
6 . The DAC of claim 2 , wherein:
the first current source is coupled between the fourth resistive element and the output of the DAC cell; and
the second current source is coupled between the fourth resistive element and the output of the DAC cell.
7 . The DAC of claim 2 , wherein:
the first current source is coupled between the fourth resistive element and the output of the DAC cell; and
the second current source is coupled between the output of the DAC cell and a node between the second resistive element and the third resistive element.
8 . The DAC of claim 2 , wherein the plurality of switches includes:
a first switch coupled between the voltage rail and the first resistive element of the plurality of resistive elements;
a second switch coupled between the voltage rail and a first node between the second resistive element and the third resistive element;
a third switch coupled between the first switch and the first current source;
a fourth switch coupled between a second node and a third node, the second node being between the first resistive element and the second resistive element and the third node being between the third resistive element and the fourth resistive element; and
a fifth switch coupled between the third node and the first current source.
9 . The DAC of claim 2 , further comprising:
a third current source coupled between the resistive network and the output of the DAC cell; and
a fourth current source coupled between the resistive network and the output of the DAC cell.
10 . The DAC of claim 9 , wherein the plurality of resistive elements further includes:
a first switch coupled between the voltage rail and the first resistive element;
a second switch coupled between the voltage rail and a node between the second resistive element and the third resistive element;
a third switch coupled between the voltage rail and a node between the third resistive element and the fourth resistive element; and
a fourth switch coupled between the voltage rail and a node between the second resistive element and the third resistive element.
11 . The DAC of claim 1 , further comprising:
a first switch coupled between the first bias node and the second bias node; and
a second switch coupled between the voltage rail and the second bias node.
12 . A method for digital-to-analog conversion, comprising:
receiving a digital input code at an input of a digital-to-analog converter (DAC) comprising a plurality of DAC cells; and
generating, via the DAC, an analog output signal based on the digital input code, wherein each DAC cell in a set of the DAC cells comprises:
a first current source coupled to an output of the DAC cell, wherein a control input of the first current source is coupled to a first bias node of the DAC;
a second current source coupled to the output of the DAC cell, wherein a control input of the second current source is coupled to a second bias node of the DAC, the second bias node being different than the first bias node;
a resistive network including a plurality of resistive elements coupled between a voltage rail and the first current source, wherein the resistive network is coupled to the first current source and the second current source; and
a plurality of switches coupled between the voltage rail and nodes of the resistive network.
13 . The method of claim 12 , wherein:
the plurality of resistive elements includes a first resistive element, a second resistive element, a third resistive element, and a fourth resistive element;
the second resistive element is coupled between the first resistive element and the third resistive element; and
the third resistive element is coupled between the second resistive element and the fourth resistive element.
14 . The method of claim 13 , wherein the plurality of switches includes:
a first switch coupled between the voltage rail and the first resistive element of the plurality of resistive elements, the method further comprising closing the first switch when operating the DAC with a full-scale current (IFS) of a base value;
a second switch coupled between the voltage rail and a node between the third resistive element and the fourth resistive element, the method further comprising closing the second switch when operating the DAC with an I FS of four times the base value or eight times the base value; and
a third switch coupled between the voltage rail and a node between the second resistive element and the third resistive element, the method further comprising closing the third switch when operating the DAC with an I FS of two times the base value.
15 . The method of claim 13 , wherein the first current source is coupled between the fourth resistive element and an output of the DAC cell, and wherein the second current source is coupled between the output of the DAC cell and a node between the second resistive element and the third resistive element.
16 . The method of claim 13 , wherein the plurality of switches includes:
a first switch coupled between the voltage rail and the first resistive element of the plurality of resistive elements, the method further comprising closing the first switch when operating the DAC with an I FS of a base value or two times the base value;
a second switch coupled between the voltage rail and a node between the third resistive element and the fourth resistive element, the method further comprising closing the second switch when operating the DAC with an I FS of four times the base value or eight times the base value; and
a third switch coupled between the first current source and a node between the second resistive element and the third resistive element, the method further comprising closing the third switch when operating the DAC with an I FS of two times the base value or eight times the base value.
17 . The method of claim 13 , wherein the plurality of switches includes:
a first switch coupled between the voltage rail and the first resistive element of the plurality of resistive elements, the method further comprising closing the first switch when operating the DAC with an I FS of a base value;
a second switch coupled between the voltage rail and a first node between the second resistive element and the third resistive element, the method further comprising closing the second switch when operating the DAC with an I FS of two times, four times, or eight times the base value;
a third switch coupled between the first switch and the first current source, the method further comprising closing the third switch when operating the DAC with an I FS of four times the base value;
a fourth switch coupled between a second node and a third node, the second node being between the first resistive element and the second resistive element and the third node being between the third resistive element and the fourth resistive element, the method further comprising closing the fourth switch when operating the DAC with an I FS of eight times the base value; and
a fifth switch coupled between the third node and the first current source, the method further comprising closing the fifth switch when operating the DAC with an I FS of eight times the base value.
18 . The method of claim 13 , further comprising:
a third current source coupled between the resistive network and the output of the DAC cell; and
a fourth current source coupled between the resistive network and the output of the DAC cell.
19 . The method of claim 18 , wherein the plurality of resistive elements further includes:
a first switch coupled between the voltage rail and the first resistive element, the method further comprising closing the first switch when operating the DAC with an I FS of a base value;
a second switch coupled between the voltage rail and a node between the second resistive element and the third resistive element, the method further comprising closing the second switch when operating the DAC with an I FS of two times the base value;
a third switch coupled between the voltage rail and a node between the third resistive element and the fourth resistive element, the method further comprising closing the third switch when operating the DAC with an I FS of four times, eight times, or sixteen times the base value; and
a fourth switch coupled between the voltage rail and a node between the first resistive element and the second resistive element, the method further comprising closing the fourth switch when operating the DAC with an I FS of sixteen times the base value.
20 . A wireless device comprising:
one or more antennas;
a digital-to-analog converter (DAC) comprising a plurality of DAC cells; and
a transmit path coupled between the DAC and the one or more antennas, wherein at least one of the DAC cells comprises:
a first current source coupled to an output of the DAC cell, wherein a control input of the first current source is coupled to a first bias node of the DAC;
a second current source coupled to the output of the DAC cell, wherein a control input of the second current source is coupled to a second bias node of the DAC, the second bias node being different than the first bias node;
a resistive network including a plurality of resistive elements coupled between a voltage rail and the first current source, wherein the resistive network is coupled to the first current source and the second current source; and
a plurality of switches coupled between the voltage rail and nodes of the resistive network.