IP Library › Assignment 026110/0643
Patent Assignment
Reel/Frame 026110/0643

Merger

Recorded: 2011-03-31 Pages: 9
Assignor
NEC ELECTRONICS AMERICA, INC.
Executed: 2010-04-01
Assignee
RENESAS ELECTRONICS AMERICA, INC.
2880 SCOTT BOULEVARD, SANTA CLARA, CALIFORNIA, 95050-2554
Covered Properties (93)
Plasma Etch Vaporous Exhaust Collection System
Patent: 4,968,336 →
Application: 07/352,430 →
Cache Memory Management Unit
Patent: 5,347,642 →
Application: 07/443,996 →
Dynamic Random Access Memory with Internally Gated Ras
Patent: 4,998,222 →
Application: 07/445,067 →
A Computer System with a Bus Controller
Patent: 5,396,599 →
Application: 07/464,838 →
Dual Input Universal Logic Structure
Patent: 5,039,883 →
Application: 07/482,615 →
Stepper Motor Drive for Way Flow End Station
Patent: 5,077,511 →
Application: 07/507,420 →
Segmented Flash Write
Patent: 5,119,331 →
Application: 07/576,745 →
Multiple Filament Enhanced Ion Source
Patent: 5,256,947 →
Application: 07/595,077 →
Image Compression Systems with Optimized Data Access
Patent: 5,396,343 →
Application: 07/669,542 →
Single Gate Structure with Oxide Layer Therein
Patent: 5,093,700 →
Application: 07/683,517 →
Single-Component Memory Controller Utilizing Asynchronous State Machines
Patent: 5,325,515 →
Application: 07/699,823 →
Memory with Phase Locked Serial Input Port
Patent: 5,260,909 →
Application: 07/793,979 →
Polysilicon Taper Process Using Spin-on Glass
Patent: 5,225,376 →
Application: 07/823,038 →
Secured Plcc Package Tray
Patent: 5,238,110 →
Application: 07/834,904 →
An N-Word Read/Write Access Achieving Double Bandwidth Without Increasing the Width of the External Data I/O Bus
Patent: 5,341,488 →
Application: 07/837,555 →
Testing and Emulation of Integrated Circuits
Patent: 5,331,571 →
Application: 07/919,417 →
Integer Divide Using Shift and Subtract
Patent: 5,297,073 →
Application: 07/932,393 →
Feed-Forward Neural Network
Patent: 5,438,646 →
Application: 07/932,827 →
A Method for Counting the Number of Program Instructions Completed by a Microprocessor
Patent: 5,257,358 →
Application: 07/979,347 →
Structure for Enabling Direct Memory-to-Memory Transfer with a Fly-by Dma Unit
Patent: 5,416,916 →
Application: 08/012,613 →
Valve Structure
Patent: 5,305,794 →
Application: 08/031,064 →
Multiple Filament Enhanced Ion Source
Patent: 5,438,238 →
Application: 08/035,337 →
Triple Port Cache Memory
Patent: 5,442,770 →
Application: 08/076,286 →
Current Switch for a High Speed Dac
Patent: 5,373,294 →
Application: 08/090,598 →
Highly Parallel Discrete Cosine Transform Engine
Patent: 5,434,808 →
Application: 08/145,263 →
Photoresist Solvent Fume Exhaust Scrubber
Patent: 5,427,610 →
Application: 08/250,229 →
Dct Peripheral for a Digital Signal Processor
Patent: 5,453,946 →
Application: 08/258,804 →
Current Switch for a High Speed Dac
Patent: 5,463,394 →
Application: 08/259,813 →
Image Compression Systems with Optimized Data Access
Patent: 5,606,428 →
Application: 08/260,646 →
Modification to a Y-Scan Monitor Circuit
Patent: 5,528,164 →
Application: 08/283,459 →
Semiconductor Processing Backup System
Patent: 5,748,470 →
Application: 08/596,785 →
Method for Optimizing an Equalization and Receive Filter
Patent: 5,949,820 →
Application: 08/690,950 →
Methods and Structure for Combined Analog and Digital Automatic Gain Control in Sampled-Data Receivers
Patent: 5,796,358 →
Application: 08/693,587 →
Methods and Structure for Sampled-Data Timing Recovery with Reduced Complexity and Latency
Patent: 5,808,573 →
Application: 08/695,327 →
Security for a Mobile or Personal Communications Device Having an Identification Code
Patent: 6,167,252 →
Application: 08/703,497 →
Parallel Access Virtual Channel Memory System
Patent: 6,167,486 →
Application: 08/746,829 →
Prml System with Reduced Complexity Maximum Likelihood Detector
Patent: 5,914,989 →
Application: 08/800,989 →
Systems and Methods for Fault Tolerant Information Processing
Patent: 5,864,654 →
Application: 08/801,237 →
Bit-Field Peripheral
Patent: 6,081,869 →
Application: 08/907,066 →
Temperature/Voltage Compensation Circuit
Patent: 6,154,017 →
Application: 09/099,867 →
Combinational Test Pattern Generation Method and Apparatus
Patent: 6,480,980 →
Application: 09/265,513 →
Publication: US 2002/0133775
Direct Access Logic Testing in Integrated Circuits
Patent: 6,385,748 →
Application: 09/281,370 →
Indiret Addressing Capability Peripheral Unit Having a Dual-Port Memory for Storing Data in a Location Addressed by Address Signal Group Stored in Another Memory
Patent: 6,594,710 →
Application: 09/320,262 →
Apparatus and Method for an Array Processing Accelerator for a Digital Signal Processor
Patent: 6,415,255 →
Application: 09/329,499 →
Identifying Relationships Among Constituent Parts of a Wafer Fabrication System
Patent: 6,766,212 →
Application: 09/352,984 →
Identifying Wafer Fabrication System Impacts Resulting from Specified Actions
Patent: 6,728,590 →
Application: 09/353,687 →
Polyimide Coating Process with Dilute Tmah and Di-Water Backrinse
Patent: 6,171,980 →
Application: 09/368,562 →
Method and Apparatus for Transferring Vector Data Between Memory and a Register File
Patent: 6,813,701 →
Application: 09/375,328 →
System for Posting Vector Synchronization Instrutions to Vector Instruction Queue to Seperate Vector Instructions from Different Application Programs
Patent: 6,625,720 →
Application: 09/375,718 →
Vector Transfer System Generating Address Error Exception When Vector to Be Transferred Does Not Start and End on Same Memory Page
Patent: 6,513,107 →
Application: 09/375,873 →
Bus Protocol for Efficiently Transferring Vector Data
Patent: 6,665,749 →
Application: 09/375,876 →
Context Switching for Vector Transfer Unit
Patent: 6,553,486 →
Application: 09/376,125 →
Virtual Channel Memory System
Patent: 6,327,642 →
Application: 09/437,810 →
Parallel Access Virtual Channel Memory System
Patent: 6,477,621 →
Application: 09/438,001 →
Apparatus and Method for Implementing a Decoder for Convolutionally Encoded Symbols
Patent: 6,560,749 →
Application: 09/493,764 →
Digital Signal Processor Decoding of Convolutionally Encoded Symbols
Patent: 6,622,283 →
Application: 09/493,767 →
Apparatus and method for instruction cache access
Patent: 6,360,310 →
Application: 09/496,786 →
Operationally Positionable Source Magnet Field
Patent: 6,693,289 →
Application: 09/499,435 →
Solvent Pre-Wet System for Wafers
Patent: 6,551,403 →
Application: 09/605,447 →
Four Dimensional Equalizer and Far-End Cross Talk Canceler in Gigabit Ethernet Signals
Patent: 6,859,508 →
Application: 09/672,644 →
Regulated Low-Voltage Generation Circuit
Patent: 6,384,586 →
Application: 09/733,650 →
Apparatus and Method for Distribution of Dopant Gases or Vapors in an Arc Chamber for Use in an Ionization Source
Patent: 6,627,901 →
Application: 09/754,442 →
Publication: US 2002/0084258
Multi-Level Power Macromodeling
Patent: 6,625,781 →
Application: 09/771,100 →
Publication: US 2002/0138809
Determining If a Potential Customer Is a Desirable Customer
Patent: 8,090,617 →
Application: 09/939,949 →
Front Opening Unified Pod (Foup) Hoist Jig
Patent: 6,655,898 →
Application: 10/014,765 →
Performance Improvement of a Write Instruction of a Non-Inclusive Hierarchical Cache Memory Unit
Patent: 6,715,040 →
Application: 10/041,932 →
Publication: US 2002/0174304
Calibrating a Wire Load Model for an Integrated Circuit
Patent: 7,149,991 →
Application: 10/158,670 →
Publication: US 2004/0205683
Permanent Chip Id Using Feram
Patent: 6,952,623 →
Application: 10/190,408 →
Publication: US 2004/0006404
Parallel Access Virtual Channel Memory System
Patent: 6,708,254 →
Application: 10/259,054 →
Publication: US 2003/0088742
Combinational Test Pattern Generation Method and Apparatus
Patent: 6,782,502 →
Application: 10/262,271 →
Publication: US 2003/0079167
Usb Endpoint Controller Flexible Memory Management
Patent: 7,069,373 →
Application: 10/289,620 →
Publication: US 2004/0093454
Vector Transfer System Generating Address Error Exception When Vector to Be Transferred Does Not Start and End on Same Memory Page
Patent: 6,742,106 →
Application: 10/352,511 →
Publication: US 2003/0167387
Apparatus and Method for Implementing a Decoder for Convolutionally Encoded Symbols
Patent: 6,868,521 →
Application: 10/386,837 →
Publication: US 2003/0177431
Tungsten Plug Corrosion Prevention Method Using Water
Patent: 7,253,092 →
Application: 10/602,291 →
Publication: US 2004/0266180
System and Method for Reducing Timing Violations Due to Crosstalk in an Integrated Circuit Design
Patent: 7,069,528 →
Application: 10/650,010 →
Publication: US 2005/0050496
Tungsten Plug Corrosion Prevention Method Using Ionized Air
Patent: 7,052,992 →
Application: 10/695,528 →
Publication: US 2005/0090112
Pci-Express to Pci/Pci X Translator
Patent: 7,313,643 →
Application: 10/780,023 →
Publication: US 2005/0182887
Vector Transfer System for Packing Dis-Contiguous Vector Elements Together into a Single Bus Transfer
Patent: 7,610,469 →
Application: 10/812,323 →
Publication: US 2004/0186980
Adhesion Promotion Vacuum Monitoring System for Photo Resist Coaters
Patent: 7,322,225 →
Application: 10/983,456 →
Publication: US 2006/0096355
Metal Capping of Damascene Structures to Improve Reliability Using Hyper Selective Chemical-Mechanical Deposition
Patent: 7,795,150 →
Application: 10/998,467 →
Publication: US 2006/0115976
System and Method for Calculating Effective Capacitance for Timing Analysis
Patent: 7,454,719 →
Application: 11/195,237 →
Publication: US 2005/0268262
Cmp Wafer Contamination Reduced by Insitu Clean
Patent: 7,344,989 →
Application: 11/207,400 →
Publication: US 2007/0039927
Tungsten Plug Corrosion Prevention Method Using Ionized Air
Patent: 7,507,664 →
Application: 11/443,483 →
Publication: US 2006/0292869
Advanced Method for Stepper Motor Speed Determination
Patent: 8,089,239 →
Application: 12/148,002 →
Publication: US 2009/0261772
Digital I/O Signal Scheduler
Patent: 8,140,723 →
Application: 12/264,538 →
Publication: US 2010/0114376
Xcp on 2 Csi
Patent: 8,085,066 →
Application: 12/582,757 →
Publication: US 2011/0090102
Transparent Multiplexing of Analog-to-Digital Converters
Patent: 8,022,853 →
Application: 12/612,298 →
Publication: US 2011/0102221
Dedicated Sample and Hold Modules
Patent: 8,022,848 →
Application: 12/612,330 →
Publication: US 2011/0102218
Analog-To-Digital Converter Control Using Signal Objects
Patent: 8,711,023 →
Application: 12/612,353 →
Publication: US 2011/0106415
Analog Comparators in a Control System
Patent: 8,010,722 →
Application: 12/622,609 →
Publication: US 2010/0109733
Reference Distribution Bus
Patent: 8,156,269 →
Application: 12/756,262 →
Publication: US 2010/0191438
Microcontroller Peripheral Event Distribution Bus
Patent: 8,176,225 →
Application: 12/756,310 →
Publication: US 2010/0199014
Communication Over Power Lines
Patent: 8,446,943 →
Application: 12/766,204 →
Publication: US 2011/0261874
Related Assignments (3)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignors Interest. Aug 19, 1992
From: DAVIDIAN, DAVID
To: NEC ELECTRONICS INC.
Reel/Frame 006235/0863 →
Release by Secured Party Sep 14, 2009
From: CITIBANK, N.A.
To: UNISYS CORPORATION; UNISYS HOLDING CORPORATION
Reel/Frame 023263/0631 →
Change of Name of Assignee Mar 30, 2011
From: NEC ELECTRONICS, INC.
To: NEC ELECTRONICS AMERICA, INC.
Reel/Frame 026110/0316 →