IP Library Assignment 030055/0337
Patent Assignment
Reel/Frame 030055/0337

Assignment of Assignor's Interest

Recorded: 2013-03-19 Pages: 9
Assignor
MICRON TECHNOLOGY, INC.
Executed: 2013-03-18
Assignee
ROUND ROCK RESEARCH, LLC
P. O. BOX 1042, MOUNT KISCO, NEW YORK, 10549
Covered Properties (41)
Panarization Process with Abrasive Polishing Slurry That Is Selective to a Planarized Surface
Patent: 6,062,952 →
Application: 08/869,256 →
Highly Conductive Composite Polysilicon Gate for Cmos Integrated Circuits
Patent: 6,492,694 →
Application: 09/031,637 →
Publication: US 2002/0014660
Method for Forming Dual Damascene Structures
Patent: 6,204,166 →
Application: 09/137,525 →
Integrated Circuit with Oxidation-Resistant Polymeric Layer
Patent: 6,288,442 →
Application: 09/145,012 →
Semiconductor Devices, and Semiconductor Processing Methods
Patent: 6,828,683 →
Application: 09/219,041 →
Publication: US 2002/0020919
Forming Submicron Integrated-Circuit Wiring from Gold,Silver,Copper, and Other Metals
Patent: 6,211,049 →
Application: 09/256,123 →
Forming Submicron Integrated-Circuit Wiring from Gold, Silver, Copper and Other Metals
Patent: 6,208,016 →
Application: 09/256,124 →
Hydrophobic Foamed Insulators for High Density Circuits
Patent: 7,276,788 →
Application: 09/382,524 →
Methods and Apparatus for Making Integrated-Circuit Wiring from Copper, Silver, Gold, and Other Metals
Patent: 6,429,120 →
Application: 09/488,098 →
Integrated Circuitry Including a Capacitor with an Amorphous and a Crystalline High K Capacitor Dielectric Region
Patent: 7,005,695 →
Application: 09/512,149 →
Planarization Process with Abrasive Poli Shing Slurry That Is Selective to a Planarized Surface
Patent: 6,379,225 →
Application: 09/569,921 →
Multilevel copper interconnects with low-k dielectrics and air gaps
Patent: 6,423,629 →
Application: 09/583,514 →
Compositions of Matter
Patent: 6,719,919 →
Application: 09/641,826 →
Damascene Structure and Method of Making
Patent: 6,451,683 →
Application: 09/648,465 →
Forming Submicron Integrated-Circuit Wiring from Gold, Silver, Copper, and Other Metals
Patent: 6,849,927 →
Application: 09/789,091 →
Publication: US 2001/0010403
Methods of Forming a Capacitor with an Amorphous and a Crystalline High K Capacitor Dielectric Region
Patent: 6,953,721 →
Application: 09/797,899 →
Publication: US 2001/0015453
A Mask Ona Polymer Having an Opening Width Less Than That of the Opening in the Polymer
Patent: 6,552,432 →
Application: 09/944,984 →
Publication: US 2002/0020920
Highly Conductive Composite Polysilicon Gate for Cmos Integrated Circuits
Patent: 6,573,169 →
Application: 09/964,172 →
Publication: US 2002/0014672
Damascene Structure and Method of Making
Patent: 6,573,572 →
Application: 09/984,776 →
Publication: US 2002/0048931
Multilevel Copper Interconnects with Low-K Dielectrics and Air Gaps
Patent: 7,091,611 →
Application: 10/093,244 →
Publication: US 2002/0098677
Damascene Structure with Low Dielectric Constant Insulating Layers
Patent: 6,534,835 →
Application: 10/139,514 →
Publication: US 2002/0130375
A Memory System with Conductive Structures Embedded in Foamed Insulator
Patent: 6,979,848 →
Application: 10/179,091 →
Publication: US 2002/0175405
Insulators for High Density Circuits
Patent: 6,838,764 →
Application: 10/179,110 →
Publication: US 2002/0171124
Insulators for High Density Circuits
Patent: 6,872,671 →
Application: 10/179,151 →
Publication: US 2002/0168872
Methods and Apparatus for Making Integrated-Circuit Wiring from Copper, Silver, Gold, and Other Metals
Patent: 6,756,298 →
Application: 10/211,855 →
Publication: US 2002/0197850
Atomic Layer Deposited Hfsion Dielectric Films Wherein Each Precursor Is Independendently Pulsed
Patent: 7,199,023 →
Application: 10/229,903 →
Publication: US 2004/0043569
High Performance Three-Dimensional Tft-Based Cmos Inverters, and Computer Systems Utilizing Such Novel Cmos Inverters
Patent: 6,882,010 →
Application: 10/264,914 →
Publication: US 2004/0065884
Atomic Layer Deposited Dielectric Layers
Patent: 7,192,892 →
Application: 10/379,470 →
Publication: US 2004/0175882
High Performance Three-Dimensional Tft-Based Cmos Inverters, and Computer Systems Utilizing Such Novel Cmos Inverters
Patent: 6,808,971 →
Application: 10/759,972 →
Publication: US 2004/0144979
Computer Systems Utilizing High Performance Three-Dimensional TFT-Based CMOS Inverters
Application: 10/760,087 →
Publication: US 2004/0145399
Compositions of Matter and Barrier Layer Compositions
Patent: 7,279,118 →
Application: 10/776,553 →
Publication: US 2004/0159875
Multilevel Copper Interconnects with Low-K Dielectrics and Air Gaps
Patent: 6,995,470 →
Application: 10/786,354 →
Publication: US 2004/0164419
Methods and Apparatus for Making Integrated-Circuit Wiring from Copper, Silver, Gold, and Other Metals
Patent: 7,285,196 →
Application: 10/842,042 →
Publication: US 2004/0206308
Compensating the Workfunction of a Metal Gate Transistor for Abstraction by the Gate Dielectric Layer
Patent: 7,125,762 →
Application: 10/900,666 →
Publication: US 2006/0024892
DEVICES WITH HFSiON DIELECTRIC FILMS WHICH ARE HF-O RICH
Patent: 7,326,980 →
Application: 10/930,516 →
Publication: US 2005/0023625
Electronic Apparatus with Deposited Dielectric Layers
Patent: 7,405,454 →
Application: 11/213,013 →
Publication: US 2006/0001151
Capacitor Including a Percentage of Amorphous Dielectric Material and a Percentage of Crystalline Dielectric Material
Patent: 7,446,363 →
Application: 11/361,111 →
Publication: US 2006/0180844
Subresolution Silicon Features and Methods for Forming the Same
Patent: 7,678,648 →
Application: 11/486,800 →
Publication: US 2008/0014699
Methods and Apparatus for Making Integrated-Circuit Wiring from Copper, Silver, Gold, and Other Metals
Patent: 7,670,469 →
Application: 11/861,927 →
Publication: US 2008/0067064
Subresolution Silicon Features and Methods for Forming the Same
Patent: 8,084,845 →
Application: 12/713,125 →
Publication: US 2010/0148234
Subresolution Silicon Features and Methods for Forming the Same
Patent: 8,981,444 →
Application: 13/302,090 →
Publication: US 2012/0061740
Related Assignments (2)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Aug 28, 2009
From: MICRON TECHNOLOGY, INC.
To: APTINA IMAGING CORPORATION
Reel/Frame 023245/0186 →
Submission to Confirm That Assignment at Reel/Frame 023245/0186 Was Erroneously Recorded Against the Identified Patents/Application. Feb 17, 2010
From: MICRON TECHNOLOGY, INC.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 023957/0323 →