IP Library Assignment 037209/0158
Patent Assignment
Reel/Frame 037209/0158

Termination of Intellectual Property Security Agreement

Recorded: 2015-12-03 Pages: 9
Assignor
DBD CREDIT FUNDING LLC
Executed: 2015-11-19
Assignee
NETLIST, INC.
51 DISCOVERY, SUITE 150, IRVINE, CALIFORNIA, 92618
Covered Properties (48)
Module Having at Least One Thermally Conductive Layer Between Printed Circuit Boards
Patent: 8,971,045 →
Application: 13/731,014 →
Electronic Module with Flexible Portion
Patent: 8,864,500 →
Application: 13/653,254 →
Multi-Rank Memory Module
Application: 61/682,249 →
Circuit Providing Load Isolation and Noise Reduction
Patent: 8,782,350 →
Application: 13/412,243 →
Publication: US US20120250386A1
Apparatus and Method for Self-Test in a Multi-Rank Memory Module
Patent: 8,689,064 →
Application: 13/745,790 →
Circuit and Method for Refreshing a Memory Module
Patent: 8,599,634 →
Application: 13/584,679 →
Method and Apparatus for Optimizing Driver Load in a Memory Package
Patent: 8,787,060 →
Application: 13/288,850 →
Publication: US US20120106228A1
Method and System for Resolving Interoperability of Multiple Types of Dual in-Line Memory Modules
Application: 13/411,344 →
Publication: US US20120239874A1
Memory Module with Distributed Data Buffers and Method of Operation
Application: 61/676,883 →
Circuit for Memory Module
Patent: 8,516,188 →
Application: 13/287,081 →
System and Method of Increasing Addressable Memory Space on a Memory Board
Patent: 8,417,870 →
Application: 12/504,131 →
Publication: US US20110016269A1
Multirank Ddr Memory Modual with Load Reduction
Patent: 8,756,364 →
Application: 13/287,042 →
System and Method Utilizing Distributed Byte-Wise Buffers on a Memory Module
Patent: 8,516,185 →
Application: 12/761,179 →
Publication: US US20110016250A1
Heat Dissipation for Electronic Modules
Patent: 8,705,239 →
Application: 13/205,477 →
Arrangement of Integrated Ciruits in a Memory Module
Patent: 6,751,113 →
Application: 10/094,512 →
Publication: US US20030169614A1
Arrangement of Integrated Circuits in a Memory Module
Patent: 6,873,534 →
Application: 10/768,534 →
Publication: US US20040184301A1
Arrangement of Integrated Circuits in a Memory Module
Patent: 6,930,903 →
Application: 10/765,488 →
Publication: US US20040184300A1
Arrangement of Integrated Circuits in a Memory Module
Patent: 6,930,900 →
Application: 10/765,420 →
Publication: US US20040184299A1
High Density Memory Module Using Stacked Printed Circuit Boards
Patent: 7,254,036 →
Application: 11/101,155 →
Publication: US US20060044749A1
High Density Memory Module Using Stacked Printed Circuit Boards
Patent: 7,375,970 →
Application: 11/775,125 →
Publication: US US20080007921A1
Circuit Card with Flexible Connection for Memory Module with Heat Spreader
Patent: 7,442,050 →
Application: 11/511,523 →
High Density Module Having at Least Two Substrates and at Least One Thermally Conductive Layer Therebetween
Patent: 7,630,202 →
Application: 12/052,678 →
Publication: US US20080316712A1
Circuit with Flexible Portion
Patent: 7,811,097 →
Application: 12/237,162 →
Module Having at Least Two Surfaces and at Least One Thermally Conductive Layer Therebetween
Patent: 7,839,645 →
Application: 12/606,136 →
Publication: US US20100110642A1
Circuit with Flexible Portion
Patent: 8,033,836 →
Application: 12/874,900 →
Circuit with Flexible Portion
Patent: 8,287,291 →
Application: 13/231,870 →
Module Having at Least Two Surfaces and at Least One Thermally Conductive Layer Therebetween
Patent: 8,345,427 →
Application: 12/939,915 →
Publication: US US20110110047A1
Memory Board with Self-Testing Capability
Patent: 8,001,434 →
Application: 12/422,925 →
Circuit Providing Load Isolation and Noise Reduction
Patent: 8,154,901 →
Application: 12/422,853 →
Systems and Methods for Refreshing a Memory Module
Patent: 8,264,903 →
Application: 12/774,632 →
Memory Board with Self-Testing Capability
Patent: 8,359,501 →
Application: 13/183,253 →
Systems and Methods for Handshaking with a Memory Module
Patent: 8,489,837 →
Application: 12/815,339 →
High-Density Memory Module Utilizing Low-Density Memory Components
Patent: 7,286,436 →
Application: 11/075,395 →
Publication: US US20050281096A1
Memory Module Decoder
Patent: 7,289,386 →
Application: 11/173,175 →
Publication: US US20060062047A1
Memory Module with a Circuit Providing Load Isolation and Memory Domain Translation
Patent: 7,532,537 →
Application: 11/335,875 →
Publication: US US20060262586A1
Memory Module Decoder
Patent: 7,619,912 →
Application: 11/862,931 →
Publication: US US20080068900A1
Memory Module with a Circuit Providing Load Isolation and Memory Domain Translation
Patent: 7,636,274 →
Application: 12/408,652 →
Publication: US US20090201711A1
Memory Module Decoder
Patent: 7,864,627 →
Application: 12/577,682 →
Publication: US US20100091540A1
Circuit Providing Load Isolation and Memory Domain Translation for Memory Module
Patent: 7,881,150 →
Application: 12/629,827 →
Publication: US US20100128507A1
Circuit Providing Load Isolation and Memory Domain Translation for Memory Module
Patent: 7,916,574 →
Application: 12/955,711 →
Publication: US US20110085406A1
Circuit Providing Load Isolation and Memory Domain Translation for Memory Module
Patent: 8,072,837 →
Application: 12/981,380 →
Circuit for Providing Chip-Select Signals to a Plurality of Ranks of a Ddr Memory Module
Patent: 8,081,535 →
Application: 12/954,492 →
Publication: US US20110090749A1
Circuit for Providing Chip-Select Signals to a Plurality of Ranks of a Ddr Memory Module
Patent: 8,081,537 →
Application: 13/154,172 →
Circuit for Memory Module
Patent: 8,081,536 →
Application: 13/032,470 →
Heat Spreader for Electronic Modules
Patent: 7,619,893 →
Application: 11/707,625 →
Heat Spreader for Memory Modules
Patent: 7,839,643 →
Application: 12/617,665 →
Heat Dissipation for Electronic Modules
Patent: 8,018,723 →
Application: 12/432,591 →
Memory Module Having Thermal Conduits
Patent: 8,488,325 →
Application: 12/916,945 →
Related Assignments (9)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Jun 1, 2007
From: BHAKTA, JAYESH R.; YU, ENCHAO; CHEN, CHI SHE; FLAIG, RICHARD E.
To: NETLIST, INC.
Reel/Frame 019374/0047 →
Assignment of Assignor's Interest May 12, 2008
From: BHAKTA JAYESH R.; YU ENCHAO; CHEN CHI SHE; FLAIG RICHARD E.
To: NETLIST, INC.
Reel/Frame 020943/0765 →
Assignment of Assignor's Interest Jul 16, 2009
From: LEE, HYUN; BHAKTA, JAYESH R.
To: NETLIST INC.
Reel/Frame 022965/0347 →
Assignment of Assignor's Interest Oct 19, 2010
From: LEE, HYUN; BHAKTA, JAYESH R.
To: NETLIST, INC.
Reel/Frame 025165/0454 →
Assignment of Assignor's Interest Jan 3, 2012
From: LEE, HYUN
To: NETLIST, INC.
Reel/Frame 027520/0280 →
Assignment of Assignor's Interest May 21, 2012
From: LEE, HYUN; BHAKTA, JAYESH R.; SHETH, PARESH
To: NETLIST, INC.
Reel/Frame 028278/0219 →
Security Agreement Jul 18, 2013
From: NETLIST, INC.
To: DBD CREDIT FUNDING LLC
Reel/Frame 030830/0945 →
Security Interest Nov 20, 2015
From: NETLIST, INC.
To: SVIC NO. 28 NEW TECHNOLOGY BUSINESS INVESTMENT L.L.P.
Reel/Frame 037150/0897 →
Release of Security Interest Nov 20, 2023
From: SVIC. NO. 28 NEW TECHNOLOGY BUSINESS INVESTMENT L.L.P.
To: NETLIST, INC
Reel/Frame 065629/0328 →