IP Library Assignment 055292/0898
Patent Assignment
Reel/Frame 055292/0898

Release of Security Interest

Recorded: 2021-02-17 Pages: 7
Assignor
Assignee
FLIPCHIP INTERNATIONAL, LLC
3701 E. UNIVERSITY DRIVE, PHOENIX, ARIZONA, 85034
Covered Properties (20)
Methods and Structures for a Vertical Pillar Interconnect
Chip Scale Package Using Large Ductile Solder Balls
Patent: 6,441,487 →
Application: 08/954,426 →
Publication: US 2001/0011764
Method for Forming Chip Scale Package
Patent: 6,287,893 →
Application: 09/114,204 →
Solder Bar for High Power Flip Chips
Patent: 7,057,292 →
Application: 09/575,298 →
Polymer Collar for Solder Bumps
Patent: 6,578,755 →
Application: 09/668,450 →
Electroless Ni/Pd/Au Metallization Structure for Copper Interconnect Substrate and Method Therefor
Patent: 6,445,069 →
Application: 09/766,798 →
Publication: US 2002/0096765
Method for Forming Chip Scale Package
Patent: 6,750,135 →
Application: 09/885,846 →
Publication: US 2001/0031548
Wafer-Level Moat Structures
Patent: 7,126,164 →
Application: 10/672,165 →
Publication: US 2005/0070083
Forming Partial-Depth Features in Polymer Film
Patent: 7,118,833 →
Application: 10/672,201 →
Publication: US 2005/0069782
Build-Up Structures with Multi-Angle Vias for Chip to Chip Interconnects and Optical Bussing
Patent: 6,919,508 →
Application: 10/704,131 →
Publication: US 2005/0087356
Build-Up Structures with Multi-Angle Vias for Chip to Chip Interconnects and Optical Bussing
Patent: 7,011,988 →
Application: 11/145,948 →
Publication: US 2005/0269687
Solder Bump/Under Bump Metallurgy Structure for High Temperature Applications
Application: 11/609,036 →
Publication: US 2008/0136019
Semiconductor Device Package with Bump Overlying a Polymer Layer
Application: 11/718,192 →
Publication: US 2009/0014869
Wafer-Level Interconnect for High Mechanical Reliability Applications
Patent: 8,143,722 →
Application: 11/867,646 →
Publication: US 2008/0083986
Solder Bump Interconnect for Improved Mechanical and Thermo-Mechanical Performance
Patent: 7,973,418 →
Application: 12/107,009 →
Publication: US 2008/0308934
Under Bump Metallization Structure Having a Seed Layer for Electroless Nickel Deposition
Application: 12/142,415 →
Publication: US 2009/0057909
Enhanced Reliability for Semiconductor Devices Using Dielectric Encasement
Patent: 8,058,163 →
Application: 12/537,236 →
Publication: US 2010/0032836
Methods and Structures for a Vertical Pillar Interconnect
Application: 12/828,003 →
Publication: US 2011/0003470
Solder Bump Interconnect
Patent: 8,188,606 →
Application: 13/085,759 →
Publication: US 2011/0186995
Thin Film Structure For High Density Inductors and Redistribution in Wafer Level Packaging
Application: 61/522,628 →
Related Assignments (2)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Oct 1, 2012
From: FORCIER, ROBERT; SCOTT, DOUGLAS
To: FLIPCHIP INTERNATIONAL, LLC
Reel/Frame 029054/0952 →
Assignment of Assignor's Interest Jun 17, 2021
From: FLIPCHIP INTERNATIONAL, LLC
To: HUATIAN TECHNOLOGY(KUNSHAN) ELECTRONICS CO.,LTD.
Reel/Frame 056612/0882 →