Patent Assignment
Reel/Frame 060244/0902
Assignment of Assignor's Interest
Recorded: 2022-06-20
Received: 2022-06-20
Pages: 6
Assignor
WODEN TECHNOLOGIES INC.
Executed: 2022-04-14
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
NO.8, LI-HSIN RD. 6, HSINCHU SCIENCE PARK,, HSINCHU, TWX, 300-78, TAIWAN
Covered Properties
(24)
Method of Fabricating a Self-Aligning Damascene Memory Structure
Application:
14/140,468 →
Triple Patterning NAND Flash Memory
Application:
14/018,236 →
Triple Patterning NAND Flash Memory with SOC
Application:
14/018,163 →
Triple Patterning NAND Flash Memory with Stepped Mandrel
Application:
14/018,258 →
Method of Inhibiting Wire Collapse
Application:
13/862,222 →
Method of Fabricating a Self-Aligning Damascene Memory Structure
Application:
13/781,983 →
Methods for Increased Array Feature Density
Application:
13/760,877 →
Resist Feature and Removable Spacer Pitch Doubling Patterning Method for Pillar Structures
Application:
13/744,971 →
Method of Forming Crack Free Gap Fill
Application:
13/742,239 →
Methods for Increased Array Feature Density
Application:
13/366,916 →
Resist Feature and Removable Spacer Pitch Doubling Patterning Method for Pillar Structures
Application:
13/331,267 →
Semiconductor Die Having a Redistribution Layer
Application:
13/103,792 →
Semiconductor Die Having a Redistribution Layer
Application:
12/843,279 →
Methods for Increased Array Feature Density
Application:
12/754,602 →
Method of Fabricating a Self-Aligning Damascene Memory Structure
Application:
12/611,087 →
Resist Feature and Removable Spacer Pitch Doubling Patterning Method for Pillar Structures
Application:
12/318,609 →
Method for Fabricating Self-Aligned Complementary Pillar Structures and Wiring
Application:
12/149,151 →
Method of Making a Pillar Pattern Using Triple or Quadruple Exposure
Application:
12/005,276 →
Method for Fabricating Pitch-Doubling Pillar Structures
Application:
12/000,758 →
Semiconductor Die Having a Redistribution Layer
Application:
11/769,937 →
Method of Fabricating a Semiconductor Die Having a Redistribution Layer
Application:
11/769,927 →
Method of Fabricating a Self-Aligning Damascene Memory Structure
Application:
11/786,620 →
Method of Forming a Flash Nand Memory Cell Array with Charge Storage Elements Positioned in Trenches
Application:
11/614,894 →
Method for Isotropic Doping of a Non-Planar Surface Exposed in a Void
Application:
11/610,090 →