Thin film transistor including a compositionally-modulated active region and methods for forming the same
A thin film transistor includes an active layer and at least one gate stack. The active layer may be formed using multiple iterations of a unit layer stack deposition process, which includes an acceptor-type oxide deposition process and a post-transition metal oxide deposition process. A surface of each gate dielectric within the at least one gate stack contacts a surface of a respective layer of the oxide of the acceptor-type element so that leakage current of the active layer may be minimized. A source electrode and a drain electrode may contact an oxide layer providing lower contact resistance such as a layer of the post-transition metal oxide or a zinc oxide layer within the active layer.
1. A method of forming a semiconductor structure, the method comprising:
forming an active layer over a substrate by depositing multiple iterations of a unit layer stack deposition process, wherein the unit layer stack deposition process comprises an acceptor-type oxide deposition process that deposits an oxide of an acceptor-type element selected from Ga and W, and a post-transition metal oxide deposition process that deposits an oxide of a heavy post-transition metal element selected from In and Sn;
forming at least one gate stack including a respective gate dielectric and a respective gate electrode over the substrate such that a surface of each gate dielectric within the at least one gate stack contacts a surface of a respective layer of the oxide of the acceptor-type element;
forming a dielectric layer over the active layer;
forming a source cavity and a drain cavity through the dielectric layer and through a topmost layer within the active layer that includes the oxide of the acceptor-type element; and
forming a source electrode and a drain electrode in the source cavity and the drain cavity, respectively, wherein:
one or more gate dielectric within the at least one gate stack comprises a dielectric metal oxide material including a first metallic element, a second metallic element, and oxygen; and
the dielectric metal oxide material is formed with a vertical compositional modulation employing a chemical vapor deposition or an atomic layer deposition such that an atomic percentage of the second metallic element has a minimum at a height that is vertically spaced from a bottom surface of the dielectric metal oxide material and from a top surface of the dielectric metal oxide material.
2. The method of claim 1 , wherein forming at least one gate stack comprises forming a bottom gate electrode embedded in an insulating layer and forming a bottom gate dielectric over the bottom gate electrode.
3. The method of claim 2 , wherein forming the active layer over the substrate comprises forming the active layer over the bottom gate dielectric.
4. The method of claim 1 , wherein forming the at least one gate stack comprises forming a top gate dielectric and a top gate electrode over the active layer such that the top gate dielectric comprises the dielectric metal oxide material.
5. The method of claim 4 , wherein the dielectric layer is formed around the top gate electrode.
6. The method of claim 1 , wherein the unit layer stack deposition process further comprises a zinc oxide deposition process that deposits zinc oxide.
7. The method of claim 6 , wherein forming the source electrode and the drain electrode comprises forming the source electrode and the drain electrode directly on a topmost zinc oxide layer or a topmost post-transition metal oxide layer including the oxide of the heavy post-transition metal element within the active layer.
8. The method of claim 1 , wherein:
a vertical compositional profile of an atomic percentage of the acceptor-type element between a bottommost surface of the active layer and a topmost surface of the active layer has N local peaks in which N is an integer greater than 2; and
a bottommost peak selected from the N local peaks is higher than any of (N−2) intermediate peaks located between the bottommost peak and a topmost peak selected from the N peaks.
9. The method of claim 8 , wherein:
a vertical compositional profile of an atomic percentage of the heavy post-transition metal element between the bottommost surface of the active layer and the topmost surface of the active layer has (N−1) local peaks;
the vertical compositional profile of the atomic percentage of the heavy post-transition metal element has N local minima; and
a bottommost local minimum of the atomic percentage of the heavy post-transition metal element located at the bottommost surface of the active layer that is lower than any of (N−2) intermediate local minima located between the bottommost local minimum and a topmost local minimum of the vertical compositional profile of the atomic percentage of the heavy post-transition metal element.
10. A method of forming a thin film transistor, the method comprising:
forming a bottom gate electrode in an insulating layer;
forming a bottom gate dielectric on a top surface of the bottom gate electrode; and
forming an active layer over the bottom gate dielectric, wherein:
the active layer comprises oxygen, an acceptor-type element selected from Ga and W, and a heavy post-transition metal element selected from In and Sn;
the active layer comprises multiple instances of a unit layer stack that is repeated along a vertical direction, and each instance of the unit layer stack consists of, in order along the vertical direction, an acceptor-type oxide layer including an oxide of the acceptor-type element, a zinc oxide layer, and a post-transition metal oxide layer including an oxide of the heavy post-transition metal element;
vertically neighboring pair of instances of the unit layer stack is in direct contact with each other;
the bottom gate dielectric comprises a dielectric metal oxide material including a first metallic element, a second metallic element, and oxygen; and
the dielectric metal oxide material is formed with a vertical compositional modulation using a chemical vapor deposition or an atomic layer deposition such that an atomic percentage of the second metallic element has a minimum at a height that is vertically spaced from a bottom surface of the dielectric metal oxide material and from a top surface of the dielectric metal oxide material.
11. The method of claim 10 , wherein:
a vertical compositional profile of an atomic percentage of the acceptor-type element between a bottommost surface of the active layer and a topmost surface of the active layer has N local peaks in which N is an integer greater than 2; and
a bottommost peak selected from the N local peaks is higher than any of (N−2) intermediate peaks located between the bottommost peak and a topmost peak selected from the N peaks.
12. The method of claim 11 , wherein:
a vertical compositional profile of an atomic percentage of the heavy post-transition metal element between the bottommost surface of the active layer and the topmost surface of the active layer has (N−1) local peaks;
the vertical compositional profile of the atomic percentage of the heavy post-transition metal element has N local minima; and
a bottommost local minimum of the atomic percentage of the heavy post-transition metal element located at the bottommost surface of the active layer that is lower than any of (N−2) intermediate local minima located between the bottommost local minimum and a topmost local minimum of the vertical compositional profile of the atomic percentage of the heavy post-transition metal element.
13. The method of claim 12 , wherein:
the bottommost local minimum of the atomic percentage of the heavy post-transition metal element is a global minimum for the atomic percentage of the heavy post-transition metal element; or
the topmost local minimum of the atomic percentage of the heavy post-transition metal element is lower than any of the (N−2) intermediate local minima of the vertical compositional profile of the atomic percentage of the heavy post-transition metal element.
14. The method of claim 11 , wherein a topmost peak selected from the N local peaks within the vertical compositional profile of the atomic percentage of the acceptor-type element is located at the topmost surface of the active layer, and is higher than any of the (N−2) intervening peaks within the vertical compositional profile of the atomic percentage of the acceptor-type element.
15. The method of claim 11 , wherein:
a vertical compositional profile of an atomic percentage of zinc between the bottommost surface of the active layer and the topmost surface of the active layer has (N−1) local peaks; and
the vertical compositional profile of the atomic percentage of zinc has a global minimum at the topmost surface of the active layer.
16. The method of claim 15 , wherein:
a vertical compositional profile of an atomic percentage of the heavy post-transition metal element between the bottommost surface of the active layer and the topmost surface of the active layer has (N−1) local peaks; and
the vertical compositional profile of the atomic percentage of the heavy post-transition metal element has a global minimum at the bottommost surface of the active layer.
17. A method of forming a semiconductor structure, the method comprising:
forming an active layer located over a substrate, wherein:
the active layer comprises oxygen, an acceptor-type element selected from Ga and W, and a heavy post-transition metal element selected from In and Sn, and
the active layer comprises multiple instances of a unit layer stack that is repeated along a vertical direction, and each instance of the unit layer stack consists of, in order along the vertical direction, an acceptor-type oxide layer including an oxide of the acceptor-type element, a zinc oxide layer, and a post-transition metal oxide layer including an oxide of the heavy post-transition metal element, and each vertically neighboring pair of instances of the unit layer stack is in direct contact with each other;
forming a top gate dielectric over a middle portion of the active layer; and
forming a top gate electrode on a top surface of the top gate dielectric, wherein:
the top gate dielectric comprises a dielectric metal oxide material including a first metallic element, a second metallic element, and oxygen; and
the dielectric metal oxide material is formed with a vertical compositional modulation using a chemical vapor deposition or an atomic layer deposition such that an atomic percentage of the second metallic element has a minimum at a height that is vertically spaced from a bottom surface of the dielectric metal oxide material and from a top surface of the dielectric metal oxide material.
18. The method of claim 17 , wherein:
a vertical compositional profile of an atomic percentage of the acceptor-type element between a bottommost surface of the active layer and a topmost surface of the active layer has N local peaks in which N is an integer greater than 2; and
a topmost peak selected from the N peaks is higher than any of (N−2) intermediate peaks located between a bottommost peak and the topmost peak selected from the N peaks.
19. The method of claim 18 , wherein:
a vertical compositional profile of an atomic percentage of the heavy post-transition metal element between the bottommost surface of the active layer and the topmost surface of the active layer has (N−1) local peaks;
the vertical compositional profile of the atomic percentage of the heavy post-transition metal element has N local minima; and
a topmost local peak selected from the (N−1) local peaks of the atomic percentage of the heavy post-transition metal element is vertically offset from the topmost surface of the active layer.
20. The method of claim 18 , further comprising:
forming a dielectric layer over the active layer;
forming a source cavity and a drain cavity, wherein a first recessed horizontal surface of the active layer is formed under the source cavity, and a second recessed horizontal surface of the active layer is formed under the drain cavity;
forming a source electrode contacting the first recessed horizontal surface in the source cavity; and
forming a drain electrode contacting the second recessed horizontal surface in the drain cavity,
wherein an atomic percentage of the acceptor-type element at a surface portion of the active layer that contacts the source electrode or the drain electrode is less than an atomic percentage of the acceptor-type element at the topmost peak selected from the N peaks of the vertical compositional profile of the atomic percentage of the acceptor-type element.