IP Library › Assignment 021398/0702
Patent Assignment
Reel/Frame 021398/0702

Assignment of Assignor's Interest

Recorded: 2008-08-19 Pages: 43
Assignors
NCR CORPORATION
Executed: 2007-11-15
MAGNACHIP SEMICONDUCTOR, LTD.
Executed: 2007-11-14
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
8 LI-HSIN RD. 6, HSINCHU SCIENCE PARK, HSINCHU, 300-77, R.O.C., TAIWAN
Covered Properties (177)
Amplitude Enhanced Sampled Clipped Speech Encoder and Decoder
Patent: 5,136,652 →
Application: 06/798,057 →
Digitally Controlled Delay Circuit
Patent: 5,111,085 →
Application: 07/043,778 →
Cmos Integrated Devices in Seeded Islands
Patent: 4,799,097 →
Application: 07/078,959 →
Digital Data Bus Architecture for Computer Disk Drive Controller
Patent: 4,866,601 →
Application: 07/100,498 →
Synchronizer Circuit with Asynchronous Clearing
Patent: 5,012,127 →
Application: 07/100,499 →
Method and Apparatus for Controlling Data Transfers Through Multiple Buffers
Patent: 4,843,544 →
Application: 07/101,354 →
Architectural Arrangement for a Scsi Disk Controller Integrated Circuit
Patent: 4,965,801 →
Application: 07/101,452 →
Surface Mount Electronic Device Package
Patent: 4,754,880 →
Application: 07/103,563 →
Native Oxide Reduction for Sealing Nitride Deposition
Patent: 4,855,258 →
Application: 07/111,377 →
Logical Drawing and Transparency Circuits for Bit Mapped Video Display Controllers
Patent: 4,893,116 →
Application: 07/120,902 →
Nonvolatile Electronic Odometer with Excess Write Cycle Protection
Patent: 4,803,707 →
Application: 07/135,200 →
Self-Correcting Digitally Controlled Timing Circuit
Patent: 4,868,430 →
Application: 07/154,768 →
Digitally Compensated Multiplying Digital to Analog Converter
Patent: 4,920,344 →
Application: 07/205,046 →
Low Noise Output Buffer Circuit
Patent: 4,880,997 →
Application: 07/233,506 →
Bandgap Voltage Reference Including a Process and Temperature Insensitive Start-Up Circuit and Power-Down Capability
Patent: 4,857,823 →
Application: 07/248,218 →
A Method of Making Cmos Integrated Devices in Seeded Islands
Patent: 4,997,780 →
Application: 07/248,265 →
Method for Providing an Improved Human User Interface to a Knowledge Based System
Patent: 4,965,741 →
Application: 07/258,961 →
Method for Forming Epitaxial Silicon on Insulator Structures Using Oxidized Porous Silicon
Patent: 4,910,165 →
Application: 07/267,899 →
Buffer Circuit with Load Sensitive Transition Control
Patent: 4,906,867 →
Application: 07/269,022 →
Multiple Port Bus Interface Controller with Slave Bus
Patent: 4,935,868 →
Application: 07/276,602 →
Digital Frequency Divider
Patent: 4,991,188 →
Application: 07/282,547 →
Control Method and Apparatus for Controlling the Data Flow Rate in a Fifo Memory, for Synchronous Scsi Data Transfers
Patent: 5,237,660 →
Application: 07/289,859 →
High Frequency Integrated Circuit Channel Capacitor
Patent: 4,866,567 →
Application: 07/294,154 →
Gate Isolated Base Cell Structure with Off-Grid Gate Polysilicon Pattern
Patent: 4,928,160 →
Application: 07/297,355 →
Bus Executed Scan Testing Method and Apparatus
Patent: 4,947,395 →
Application: 07/308,917 →
Method of Making Asymmetrically Optimized Cmos Field Effect Transistors
Patent: 4,874,713 →
Application: 07/345,875 →
Semiconductor Field Oxide Formation Process Using a Sealing Sidewall of Consumable Nitride
Patent: 4,923,563 →
Application: 07/356,591 →
Integrated Controller Using Alternately Filled and Emptied Buffers for Controlling Bi-Directional Data Transfer Between a Processor and a Data Storage Device
Patent: 5,163,132 →
Application: 07/363,352 →
Memory Control System and Method
Patent: 5,283,763 →
Application: 07/410,773 →
Base for Stackable Assemblies
Patent: 4,996,628 →
Application: 07/423,914 →
Method and Apparatus for Bus Executed Boundary Scanning
Patent: 5,115,435 →
Application: 07/423,924 →
Ac Power Interconnect for Stacked Electronic Devices
Patent: 4,950,178 →
Application: 07/424,049 →
Current Limiting Output Driver
Patent: 4,962,345 →
Application: 07/432,260 →
Circuit and Method for Regulating the Current Flow in a Distributorless Ignition System Coil
Patent: 5,043,633 →
Application: 07/435,308 →
Nonvolatile Differential Memory Device and Method
Patent: 5,168,464 →
Application: 07/442,809 →
Supply Connection Integrity Monitor
Patent: 5,077,521 →
Application: 07/456,759 →
Integrated Circuit Driver for Serial Bus Having Output Over Voltage Protection
Patent: 5,019,720 →
Application: 07/491,795 →
Structure and Process for Forming Semiconductor Field Oxide Using a Sealing Sidewall of Consumable Nitride
Patent: 4,986,879 →
Application: 07/496,567 →
Process for Forming Self-Aligned Titanium Silicide by Heating in an Oxygen Rich Environment
Patent: 5,288,666 →
Application: 07/496,720 →
Low Current Driver for Gate Array
Patent: 5,029,283 →
Application: 07/500,621 →
Process for Forming Titanium Silicide Local Interconnect
Patent: 5,443,996 →
Application: 07/522,775 →
High Frequency Asynchronous Data Synchronizer
Patent: 5,047,658 →
Application: 07/532,005 →
Bit Mapped Color Cursor
Patent: 5,146,211 →
Application: 07/566,014 →
High Speed Cmos Flip-Flop Employing Clocked Tristate Inverters
Patent: 5,140,180 →
Application: 07/572,596 →
Sample-And-Hold Switch with Low on Resistance and Reduced Charge Injection
Patent: 5,111,072 →
Application: 07/574,176 →
Transient Immune Input Buffer
Patent: 5,041,741 →
Application: 07/582,461 →
Coating Solution for Forming Glassy Layers
Patent: 5,302,198 →
Application: 07/582,570 →
Single Element Security Fusible Link
Patent: 5,270,983 →
Application: 07/582,705 →
Apparatus for Arbitrating for a High Speed Direct Memory Access Bus
Patent: 5,471,639 →
Application: 07/602,610 →
High Speed Data Synchronizer
Patent: 5,132,990 →
Application: 07/608,854 →
Method for Scheduling the Execution of Disk I/O Operations
Patent: 5,644,786 →
Application: 07/610,633 →
Method and Apparatus for Controlling Noise on Power Supply Buses
Patent: 5,059,822 →
Application: 07/617,846 →
Structure for Improving Gate Oxide Integrity for a Semiconductor Formed by a Recessed Sealed Sidewall Field Oxidation Process
Patent: 5,248,350 →
Application: 07/622,107 →
Method of Estimating Logic Cell Delay Time
Patent: 5,274,568 →
Application: 07/623,310 →
Low Power Pseudo-Static Rom
Patent: 5,226,014 →
Application: 07/633,733 →
Silica-Based Anti-Reflective Planarizing Layer
Patent: 5,100,503 →
Application: 07/637,903 →
Drive Canister Mounting Module
Patent: 5,124,886 →
Application: 07/659,771 →
Method and Apparatus for Generating Disk Array Interrupt Signals
Patent: 5,179,704 →
Application: 07/668,641 →
Multiple Configuration Data Path Architecture for a Disk Array Controller
Patent: 5,345,565 →
Application: 07/668,660 →
Bus Configuration Validation for a Multiple Source Disk Array Bus
Patent: 5,430,747 →
Application: 07/669,554 →
Trinary to Binary Level Conversion Circuit
Patent: 5,045,728 →
Application: 07/683,581 →
Electrical Connection Between Buses on a Semiconductor Integrated Circuit
Patent: 5,185,652 →
Application: 07/706,428 →
Method for Designing a Scan Path for a Logic Circuit and Testing of the Same
Patent: 5,291,495 →
Application: 07/729,282 →
Spin-On Glass Composition
Patent: 5,152,834 →
Application: 07/732,009 →
Disk Controller Having Host Interface and Bus Switches for Selecting Buffer and Drive Busses Respectively Based on Configuration Control Signals
Patent: 5,257,391 →
Application: 07/746,399 →
Voltage Variable Delay Circuit
Patent: 5,231,319 →
Application: 07/749,006 →
Battery Back-Up for Electronic Circuits
Patent: 5,608,273 →
Application: 07/796,992 →
Ttl Compatible Input Buffer
Patent: 5,276,361 →
Application: 07/796,993 →
Detection of Tri-State Logic Signals
Patent: 5,432,440 →
Application: 07/796,995 →
Bufferless Scsi to Scsi Data Transfer Scheme for Disk Array Applications
Patent: 5,287,462 →
Application: 07/811,481 →
Device and Method for Approximating the Square Root of a Number
Patent: 5,268,857 →
Application: 07/818,302 →
Memory Security Device
Patent: 5,233,563 →
Application: 07/820,170 →
Connection System for Integrated Circuits
Patent: 5,288,949 →
Application: 07/829,838 →
Method and Apparatus for Synchronizing Disk Drive Requests Within a Disk Array
Patent: 5,375,217 →
Application: 07/857,539 →
Intelligent Scsi-2/Dma Processor
Patent: 5,721,954 →
Application: 07/867,951 →
Mos Amplifier with Gain Control
Patent: 5,455,816 →
Application: 07/885,711 →
Cmos Circuit for Receiving Ecl Signals
Patent: 5,283,482 →
Application: 07/909,266 →
Multi-Chip Module with Multiple Compartments
Patent: 5,369,552 →
Application: 07/913,100 →
High Speed Current/Voltage Controlled Ring Oscillator Circuit
Patent: 5,300,898 →
Application: 07/921,157 →
Method of Fabrication of Semiconductor Fuse with Polysilicon Plate
Patent: 5,963,825 →
Application: 07/935,301 →
Semiconductor Fuse and Method
Patent: 5,672,905 →
Application: 07/935,306 →
Repeatedly Programmable Logic Array Using Dynamic Access Memory
Patent: 5,432,388 →
Application: 07/935,945 →
Balanced Voltage Comparator
Patent: 5,287,070 →
Application: 07/939,225 →
Selective Sidewall Diffusion Process Using Doped Sog
Patent: 5,308,790 →
Application: 07/961,967 →
Method for Forming a Bipolar Emitter Using Doped Sog
Patent: 5,322,805 →
Application: 07/961,973 →
Reluctance Sensor Having Variable Thresholde Detection Circuit
Patent: 5,446,375 →
Application: 07/961,974 →
Phase-And-Frequency Mode/Phase Mode Detector with the Same Gain in Both Modes
Patent: 5,307,028 →
Application: 07/961,975 →
Pillar Emitter for Bicmos Devices
Patent: 6,011,283 →
Application: 07/962,544 →
Delayed Initiation of Read-Modify-Write Parity Operations in a Raid Level 5 Disk Array
Patent: 5,388,108 →
Application: 07/966,106 →
Fast Write I/O Handling in a Disk Array Using Spare Drive for Buffering
Patent: 5,418,925 →
Application: 07/966,107 →
Method and Device for Processing Multiple, Asynchronous Interrupt Signals
Patent: 5,584,028 →
Application: 07/966,620 →
Automated Test Equipment Digital Tester Expansion Apparatus
Patent: 5,701,309 →
Application: 07/984,645 →
Concurrent Image Backup for Disk Storage System
Patent: 5,487,160 →
Application: 07/985,710 →
Threshold Controlled Input Circuit for an Integrated Circuit
Patent: 5,341,046 →
Application: 07/986,184 →
Method and Apparatus for a Dynamic, Timed-Loop Arbitration
Patent: 5,301,332 →
Application: 07/995,731 →
Terminating Access of an Agent to a Shared Resource When a Timer, Started After a Low Latency Agent Requests Access, Reaches a Predetermined Value
Patent: 5,506,968 →
Application: 07/996,992 →
Multi-Chip Module Board
Patent: 5,303,121 →
Application: 07/996,993 →
Apparatus and Method for Matching Data Rates to Transfer Data Between Two Asynchronous Devices
Patent: 5,592,629 →
Application: 07/997,426 →
Solid-State Ink-Jet Print Head
Patent: 5,459,501 →
Application: 08/011,592 →
Automated Washing Method
Patent: 6,017,397 →
Application: 08/026,669 →
Step Addressing in Video Ram
Patent: 6,049,331 →
Application: 08/065,387 →
System and Method for Transferring Data Between Independent Busses
Patent: 5,455,913 →
Application: 08/068,582 →
Array Storage System for Returning an I/O Complete Signal to a Virtual I/O Daemon That Is Separated from Software Array Driver and Physical Device Driver
Patent: 5,598,549 →
Application: 08/076,652 →
Fast Cmos Charge Pump Circuit
Patent: 5,363,066 →
Application: 08/078,880 →
Method and Apparatus for Pseudo-Aligned Transfers of Data to Memory Wherein a Re-Alignment Is Performed Based on the Data Byte Control Header
Patent: 5,680,642 →
Application: 08/082,862 →
Multiclock Controller
Patent: 5,587,675 →
Application: 08/105,990 →
Single Element Security Fusible Link
Patent: 5,309,394 →
Application: 08/118,161 →
Dual-Mode Graphics Controller with Preemptive Video Access
Patent: 5,752,010 →
Application: 08/119,295 →
Structure and Method for Remotely Measuring Process Data
Patent: 5,466,614 →
Application: 08/123,664 →
Voltage-To-Current Converter Without Series Sensing Resistor
Patent: 5,519,310 →
Application: 08/125,267 →
Cmos Power Fet Driver Including Multiple Power Mosfet Transistors Connected in Parallel, Each Carrying an Equivalent Portion of the Total Driver Current
Patent: 5,442,218 →
Application: 08/128,428 →
Lightly Doped Drain Ballast Resistor
Patent: 5,498,892 →
Application: 08/129,231 →
Method for Partitioning Disk Drives Within a Physical Disk Array and Selectively Assigning Disk Drive Partitions into a Logical Disk Array
Patent: 5,568,629 →
Application: 08/148,031 →
Multi-Chip Module Packaging System
Patent: 5,497,027 →
Application: 08/159,898 →
Method and Apparatus for Calculating Dynamic Power Dissipation in Cmos Integrated Circuits
Patent: 5,521,834 →
Application: 08/159,976 →
High Voltage Stylus for Portable Computer
Patent: 5,828,011 →
Application: 08/191,908 →
Cancellation of Common-Mode Signals in Digitizing Tablet
Patent: 5,945,639 →
Application: 08/192,078 →
Current Limited Output Driver for a Gate Array Circuit
Patent: 5,444,401 →
Application: 08/198,656 →
Multi-Phase Charge Sharing Method and Apparatus
Patent: 5,574,633 →
Application: 08/200,612 →
Synchronous Telemetry Channel
Patent: 5,608,390 →
Application: 08/200,721 →
Coating Solution for Forming Glassy Layers
Patent: 5,472,488 →
Application: 08/210,386 →
Electronic Device with a Spin-on Glass Dielectric Layer
Patent: 5,527,872 →
Application: 08/214,477 →
Integrated Circuit Oscillator with High Voltage Feedback Network
Patent: 5,457,434 →
Application: 08/221,346 →
Method for Forming an Amorphous Silicon Programmable Element
Patent: 5,447,880 →
Application: 08/224,609 →
Differential Analog Transistors Constructed from Digital Transistors
Patent: 5,488,249 →
Application: 08/239,166 →
Method and Apparatus for Regulation of Power Dissipation
Patent: 5,798,667 →
Application: 08/243,679 →
Method and Apparatus for Separating Data and Clock from a Digital Data Stream
Patent: 5,598,443 →
Application: 08/247,386 →
Multi-Device Adapter Card for Computer
Patent: 5,577,213 →
Application: 08/253,530 →
Multiple Channel Data Bus Routing Switching Including Parity Generation Capabilities
Patent: 6,023,754 →
Application: 08/258,357 →
Electrostatic Discharge Protection System for Mixed Voltage Application Specific Integrated Circuit Design
Patent: 5,616,943 →
Application: 08/259,240 →
Extendible-Range Voltage Controlled Oscillator
Patent: 5,477,198 →
Application: 08/264,863 →
Compensation of Stylus Signals in Digitizing Tablet
Patent: 6,005,200 →
Application: 08/286,720 →
Multi-Chip Module with Multiple Compartments
Patent: 5,480,840 →
Application: 08/292,448 →
A Method and Apparatus for Reducing Current Consumption in a Cmos Inverter Circuit
Patent: 5,491,429 →
Application: 08/307,111 →
5-Volt Tolerant Bi-Directional I/O Pad for 3-Volt-Optimized Integrated Circuits
Patent: 5,528,447 →
Application: 08/315,799 →
Noise Cancellation for Non-Ideal Electrostatic Shielding `
Patent: 5,574,262 →
Application: 08/317,952 →
Circuit and Method for Generating a Clock Signal
Patent: 5,477,180 →
Application: 08/320,361 →
Method and Apparatus for Managing Video Data for Faster Access by Selectively Caching Video Data
Patent: 5,581,731 →
Application: 08/323,420 →
High-Frequency Phase Locked Loop Circuit
Patent: 5,675,620 →
Application: 08/329,367 →
Color Image Array Scanner with High Resolution Monochrome Mode
Patent: 5,521,640 →
Application: 08/332,272 →
Wall Outlet with Direct Current Output
Patent: 5,563,782 →
Application: 08/337,591 →
Communications Transceiver Using an Adaptive Directional Antenna
Patent: 5,617,102 →
Application: 08/342,328 →
Method and Apparatus for Polymer Coating of Substrates
Patent: 5,545,440 →
Application: 08/349,640 →
Process for Forming Titanium Silicide Local Interconnect
Patent: 5,543,361 →
Application: 08/351,843 →
Peripheral Component Interfacing System with Bus Voltage/Logic Supply Comparison Means
Patent: 5,469,082 →
Application: 08/352,331 →
Bipolar Silicon-on-Insulator Structure and Process
Patent: 6,232,649 →
Application: 08/354,574 →
Mixed Format Video Ram
Patent: 5,644,336 →
Application: 08/355,413 →
Disk Array Storage System Architecture for Parity Operations Simultaneous with Other Data Operations
Patent: 5,634,033 →
Application: 08/357,847 →
Programmably Addressable Image Sensor
Patent: 6,509,927 →
Application: 08/357,944 →
Method for Maintaining Parity-Data Consistency in a Disk Array
Patent: 5,533,190 →
Application: 08/360,198 →
Data Compression in Digitizing Tablet
Patent: 5,668,352 →
Application: 08/360,527 →
Method and Apparatus for Determining and Maintaining Drive Status from Codes Written to Disk Drives of an Arrayed Storage Subsystem
Patent: 5,644,767 →
Application: 08/385,387 →
High Speed Boundary Scan Multiplexer
Patent: 5,519,355 →
Application: 08/389,427 →
Memory with Latched Output
Patent: 5,526,310 →
Application: 08/389,429 →
Apparatus and Method for Testing of Integrated Circuits
Patent: 5,726,997 →
Application: 08/445,970 →
Sea-Of-Cells Array of Transistors
Patent: 5,671,397 →
Application: 08/455,503 →
Method for Manufacturing a Monitor Element
Patent: 5,576,224 →
Application: 08/460,287 →
A Method for Making a Solid-State Ink Jet Print Head
Patent: 5,581,861 →
Application: 08/460,485 →
Method for Performing on-Line Reconfiguration of a Disk Array Concurrent with Execution of Disk I/O Operations
Patent: 5,574,851 →
Application: 08/482,425 →
Analog Output Driver for Gate Arrays
Patent: 5,541,548 →
Application: 08/484,197 →
Tunable architecture for device adapter
Patent: 6,292,764 →
Application: 08/497,003 →
Differential Analog Transistors Constructed from Digital Transistors
Patent: 5,610,429 →
Application: 08/517,641 →
System for Testing the Functionality of Video Card and Monitor by Using Program to Enable User to View List of Modes and Select Compatible Mode
Patent: 5,581,788 →
Application: 08/535,364 →
Data Storage Device Matrix Architecture
Patent: 5,550,986 →
Application: 08/539,663 →
Sea-Of- Cells Array of Transistors
Patent: 5,869,900 →
Application: 08/543,335 →
Integral Bit Error Rate Test System for Serial Data Communication Links
Patent: 5,726,991 →
Application: 08/545,915 →
Spin-On Conductor Process for Integrated Circuits
Patent: 5,728,626 →
Application: 08/553,788 →
Method and Apparatus for the Protection of Write Data in a Disk Array
Patent: 5,596,708 →
Application: 08/591,366 →
Architectural Arrangement for a Video Server
Patent: 5,625,405 →
Application: 08/603,694 →
Electronic Device with a Spin-on Glass Dielectric Layer
Patent: 5,665,845 →
Application: 08/609,589 →
Universal Power Interface Adapter for Burn-in Board
Patent: 5,672,981 →
Application: 08/614,925 →
Field Implant for Silicon Controlled Rectifier
Patent: 5,894,153 →
Application: 08/625,986 →
Wall Outlet with Direct Current Output
Patent: 6,061,261 →
Application: 08/712,826 →
Centralized Management of Resources Shared by Multiple Processing Units
Patent: 6,009,275 →
Application: 08/729,193 →
High Voltagle Stylus for Portable Computers
Patent: 5,994,651 →
Application: 08/818,615 →
Single-Edge Triggered Phase Detector
Patent: 5,754,080 →
Application: 08/834,154 →
Method for Cell Swapping to Improve Pre-Layout to Post-Layout Timing
Patent: 6,272,668 →
Application: 09/318,388 →
Related Assignments (25)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignors Interest. Nov 14, 1985
From: JIBBE, MAHMOUD K.; DE MOSS, ROBERT A.; HOYER, ELMER A.; FURRY, MERLE E.
To: NCR CORPORATION, A CORP OF MARYLAND
Reel/Frame 004484/0682 →
Assignment of Assignors Interest. Apr 29, 1987
From: STEWART, JOHN W.
To: NCR CORPORATION, A CORP. OF MARYLAND
Reel/Frame 004699/0911 →
Assignment of Assignors Interest. Jul 29, 1987
From: SZLUK, NICHOLAS J.; FUKUMOTO, JAY T.
To: NCR CORPORATION, DAYTON, OHIO, A CORP. OF
Reel/Frame 004796/0109 →
Assignment of Assignors Interest. Sep 24, 1987
From: GATES, DENNIS E.; WEBER, BRET S.
To: NCR CORPORATION, DAYTON, OHIO, A CORP. OF MARYLAND
Reel/Frame 004804/0273 →
Assignment of Assignors Interest. Sep 24, 1987
From: DULAC, KEITH B.; GATES, DENNIS E.
To: NCR CORPORATION, DAYTON, OHIO, A CORP. OF MARYLAND
Reel/Frame 004804/0271 →
Assignment of Assignors Interest. Sep 25, 1987
From: DU LAC, KEITH B.; WEBER, BRET S.
To: NCR CORPORATION, DAYTON, OHIO A CORP. OF MARYLAND
Reel/Frame 004804/0538 →
Assignment of Assignors Interest. Sep 28, 1987
From: DU LAC, KEITH B.
To: NCR CORPORATION, DAYTON, OHIO, A CORP. OF
Reel/Frame 004793/0433 →
Assignment of Assignors Interest. Oct 1, 1987
From: TEHRANI, KAZEM N.
To: NCR CORPORATON, DAYTON, OHIO, A CORP. OF
Reel/Frame 004788/0868 →
Assignment of Assignors Interest. Oct 22, 1987
From: ALLMAN, DERRYL D.J.; LEE, STEVEN S.
To: NCR CORPORATION, DAYTON, OHIO, A CORP. OF
Reel/Frame 004795/0083 →
Assignment of Assignors Interest. Nov 16, 1987
From: HENDERSON, DAVID L.; HERBERT, BRIAN K.; LAHEY, MICHAEL D.; ROBBINS, JAMEY L.
To: NCR CORPORATION, A CORP. OF MARYLAND
Reel/Frame 004819/0093 →
Assignment of Assignors Interest. Dec 21, 1987
From: CORDAN, ERNEST W. JR.
To: NCR CORPORATION, DAYTON, OHIO, A CORP. OF MARYLAND
Reel/Frame 004802/0941 →
Assignment of Assignors Interest. Feb 1, 1988
From: STEWART, JOHN W.
To: NCR CORPORATION, A CORP. OF MD
Reel/Frame 004859/0548 →
Assignment of Assignors Interest. Aug 18, 1988
From: STEELE, DAVID P.
To: NCR CORPORATION, A CORP. OF MARYLAND
Reel/Frame 004974/0296 →
Assignment of Assignors Interest. Sep 22, 1988
From: BITTING, RICKY F.
To: NCR CORPORATION, DAYTON, OH A CORP. OF MD
Reel/Frame 004950/0450 →
Assignment of Assignors Interest. Oct 17, 1988
From: WINCHELL, MICHAEL A.; STEELE, ROBIN L.
To: NCR CORPORATION, A CORP. OF MD
Reel/Frame 004960/0553 →
Assignment of Assignors Interest. Nov 9, 1988
From: PETTY, WILLIAM K.
To: NCR CORPORATION, DAYTON
Reel/Frame 004954/0760 →
Assignment of Assignors Interest. Nov 28, 1988
From: DU LAC, KEITH B.
To: NCR CORPORATION, A CORP. OF MD
Reel/Frame 004978/0798 →
Assignment of Assignors Interest. Dec 12, 1988
From: PERKINS, LUKE A.
To: NCR CORPORATION, A MD CORP.
Reel/Frame 004986/0422 →
Assignment of Assignors Interest. Dec 27, 1988
From: WEBER, BRET S.; REIF, JAMES R.; HOGLUND, TIMOTHY E.
To: NCR CORPORATION
Reel/Frame 004999/0570 →
Assignment of Assignors Interest. Jan 6, 1989
From: CRAFTS, HAROLD S.; SCAGGS, MARK Q.
To: NCR CORPORATION, A CORP. OF MD
Reel/Frame 005015/0910 →
Assignment of Assignors Interest. Jan 17, 1989
From: CRAFTS, HAROLD S.
To: NCR CORPORATION
Reel/Frame 005022/0282 →
Option Feb 10, 1989
From: BULLINGER, PHILIP W.; LANGFORD, THOMAS L. II; STEWART, JOHN W.
To: NCR CORPORATION, A CORP. OF MD
Reel/Frame 005040/0874 →
Security Interest Dec 6, 1990
From: GEN-PROBE INCORPORATED
To: ML TECHNOLOGY VENTURES
Reel/Frame 005559/0060 →
Assignment of Assignors Interest. Mar 30, 1992
From: ML TECHNOLOGY VENTURES, L.P.
To: GEN-PROBE INCORPORATED
Reel/Frame 006057/0433 →
Assignment of Assignor's Interest Mar 14, 1995
From: AT&T GLOBAL INFORMATION SOLUTIONS COMPANY (FORMERLY KNOWN AS NCR CORPORATION)
To: HYUNDAI ELECTRONICS AMERICA
Reel/Frame 007408/0104 →