IP Library Assignment 022597/0896
Patent Assignment
Reel/Frame 022597/0896

Assignment of Assignor's Interest

Recorded: 2009-04-28 Pages: 8
Assignor
INAPAC TECHNOLOGY, INC.
Executed: 2009-02-27
Assignee
RAMBUS INC.
4440 EL CAMINO REAL, LOS ALTOS, CALIFORNIA, 94022
Covered Properties (39)
Chip Testing Within a Multi-Chip Semiconductor Package
Patent: 6,732,304 →
Application: 09/666,208 →
Circuit and Method for Determining the Operating Point of a Semiconductor Device
Patent: 6,693,449 →
Application: 09/851,512 →
Systems and Methods for a High-Speed Dynamic Data Bus
Patent: 7,157,940 →
Application: 09/888,970 →
Configurable Addressing for Multiple Chips in a Package
Patent: 6,657,914 →
Application: 09/909,675 →
Testing of Integrated Circuit Devices
Patent: 6,754,866 →
Application: 09/967,389 →
Layout and Use of Bond Pads and Probe Pads for Testing of Integrated Circuits Devices
Patent: 7,061,263 →
Application: 10/003,375 →
High-Speed Segmented Data Bus Architecture
Patent: 6,996,652 →
Application: 10/251,530 →
Entering Test Mode and Accessing of a Packaged Semiconductor Device
Patent: 6,812,726 →
Application: 10/305,635 →
Bonding Pads for Testing of a Semiconductor Device
Patent: 6,882,171 →
Application: 10/608,613 →
Publication: US 2004/0100296
Set Up for a First Integrated Circuit Chip to Allow for Testing of a Co-Packaged Second Integrated Circuit Chip
Patent: 7,006,940 →
Application: 10/679,673 →
Semiconductor device with a plurality of ground planes
Application: 10/810,510 →
Publication: US 2005/0224942
Chip Testing Within a Multi-Chip Semiconductor Package
Patent: 7,139,945 →
Application: 10/824,734 →
Publication: US 2004/0196709
Testing of Integrated Circuit Devices
Patent: 7,103,815 →
Application: 10/870,365 →
Publication: US 2004/0225937
Multiple Power Levels for a Chip Within a Multi-Chip Semiconductor Package
Patent: 7,240,254 →
Application: 10/877,687 →
Publication: US 2005/0024977
Monitoring Signals Between Two Integrated Circuit Devices Within a Single Package
Patent: 7,133,798 →
Application: 10/967,749 →
Internally Generating Patterns for Testing in an Integrated Circuit Device
Patent: 7,313,740 →
Application: 11/083,473 →
Publication: US 2005/0162182
Bonding Pads for Testing of a Semiconductor Device
Patent: 7,259,582 →
Application: 11/108,385 →
Publication: US 2005/0204223
Architecture and Method for Testing of an Integrated Circuit Device
Patent: 7,444,575 →
Application: 11/207,518 →
Publication: US 2005/0289428
Electronic Device Having an Interface Supported Testing Mode
Patent: 7,309,999 →
Application: 11/207,665 →
Publication: US 2006/0279308
Processor-Memory Unit for Use in System-in-Package and System-in-Module Devices
Patent: 7,673,193 →
Application: 11/208,099 →
Shared Bond Pad for Testing a Memory Within a Packaged Semiconductor Device
Patent: 7,245,141 →
Application: 11/223,286 →
Publication: US 2006/0152241
Component Testing and Recovery
Patent: 7,404,117 →
Application: 11/258,484 →
Publication: US 2007/0094555
Integrated Circuit Testing Module
Patent: 7,265,570 →
Application: 11/304,445 →
Publication: US 2006/0150046
Integrated Circuit Testing Module Including Data Compression
Patent: 7,370,256 →
Application: 11/369,878 →
Publication: US 2007/0168808
Integrated Circuit Testing Module Including Data Generator
Patent: 7,365,557 →
Application: 11/370,769 →
Integrated Circuit Testing Module Including Address Generator
Patent: 7,446,551 →
Application: 11/370,795 →
Isolating electric paths in semiconductor device packages
Patent: 9,899,312 →
Application: 11/403,626 →
Publication: US 2007/0241443
Integrated Circuit Testing Module Including Command Driver
Patent: 7,310,000 →
Application: 11/443,872 →
Publication: US 2006/0236180
Shared Memory Bus Architecture for System with Processor and Memory Units
Patent: 7,466,160 →
Application: 11/472,016 →
Publication: US 2007/0013402
Integrated Circuit Test Array Including Test Module
Patent: 7,307,442 →
Application: 11/479,061 →
Publication: US 2006/0253266
Delay Lock Loop Delay Adjusting Method and Apparatus
Patent: 7,269,524 →
Application: 11/480,234 →
Testing and Recovery in a Multilayer Device
Patent: 7,779,311 →
Application: 11/538,799 →
Publication: US 2007/0113126
Integrated Circuit Testing Module Including Signal Shaping Interface
Patent: 8,001,439 →
Application: 11/552,938 →
Publication: US 2007/0079204
Integrated Circuit Testing Module Configured for Set-Up and Hold Time Testing
Patent: 8,166,361 →
Application: 11/552,944 →
Publication: US 2007/0067687
Memory Device Including Multiplexed Inputs
Patent: 7,593,271 →
Application: 11/744,815 →
Publication: US 2007/0263458
Memory Accessing Circuit System
Patent: 7,466,603 →
Application: 11/906,731 →
Publication: US 2008/0089139
Electronic Device Having an Interface Supported Testing Mode
Patent: 7,443,188 →
Application: 11/981,854 →
Publication: US 2008/0061811
Testing Fuse Configurations in Semiconductor Devices
Patent: 8,063,650 →
Application: 12/008,318 →
Publication: US 2008/0278190
Programmable Memory Repair Scheme
Patent: 7,768,847 →
Application: 12/082,136 →
Publication: US 2009/0257296
Related Assignments (7)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Nov 12, 2007
From: ONG, ADRIAN E.
To: INAPEC TECHNOLOGY, INC.
Reel/Frame 020106/0911 →
Ucc Financing Statement Filed in California Aug 15, 2008
From: INAPAC TECHNOLOGY, INC.
To: CARR & FERRELL LLP
Reel/Frame 021425/0952 →
Release of Security Agreement (Ca) Jan 22, 2009
From: CARR & FERRELL LLP
To: INAPAC TECHNOLOGY, INC.
Reel/Frame 022158/0338 →
Document Re-Recorded to Correct Errors Contained in Property Number(S) 11/803,473. Doucment Previously Recorded on Reel 020108 Frame 0911. Nov 3, 2009
From: ONG, ADRIAN E.
To: INAPAC TECHNOLOGY, INC.
Reel/Frame 023466/0080 →
Assignment of Assignor's Interest Jun 4, 2014
From: RAMBUS INC.
To: SCA IPLA HOLDINGS INC.
Reel/Frame 033026/0152 →
Assignment of Assignor's Interest Dec 2, 2021
From: RAMBUS INC.
To: HIGHLANDS LLC
Reel/Frame 058298/0836 →
Assignment of Assignor's Interest Dec 10, 2021
From: HIGHLANDS LLC
To: RAMPART ASSET MANAGEMENT, LLC
Reel/Frame 058956/0139 →