IP Library Assignment 051383/0735
Patent Assignment
Reel/Frame 051383/0735

Assignment of Assignor's Interest

Recorded: 2019-12-30 Pages: 5
Assignor
ULTRATECH, INC.
Executed: 2019-12-24
Assignee
VEECO INSTRUMENTS INC.
1 TERMINAL DRIVE, PLAINVIEW, NEW YORK, 11803
Covered Properties (14)
Integrated Chip Carrier with Compliant Interconnect
Patent: 7,473,577 →
Application: 11/502,969 →
Publication: US 2008/0036061
Method of Reducing Detrimental Sti-Induced Stress in Mosfet Channels
Patent: 7,618,857 →
Application: 11/623,935 →
Publication: US 2008/0171413
Method of Removing Metallic, Inorganic and Organic Contaminants from Chip Passivation Layer Surfaces
Patent: 7,771,541 →
Application: 11/689,570 →
Publication: US 2008/0233755
Silicon Germanium Heterojunction Bipolar Transistor Structure and Method
Patent: 7,750,371 →
Application: 11/741,836 →
Publication: US 2008/0265282
Semiconductor Device and Method of Manufacture
Patent: 7,615,435 →
Application: 11/830,867 →
Publication: US 2009/0032840
Method of Forming Cmos with Si:C Source/Drain by Laser Melting and Recrystallization
Patent: 7,598,147 →
Application: 11/860,127 →
Publication: US 2009/0081836
Activating Dopants Using Multiple Consecutive Millisecond-Range Anneals
Patent: 7,786,025 →
Application: 12/405,702 →
Publication: US 2010/0240227
Method for Forming Retrograded Well for Mosfet
Patent: 8,343,818 →
Application: 12/687,287 →
Publication: US 2011/0169082
Silicon Germanium Heterojunction Bipolar Transistor Structure and Method
Patent: 8,455,322 →
Application: 12/719,212 →
Publication: US 2010/0159664
Electrical Interconnect Structure
Patent: 8,476,773 →
Application: 12/787,485 →
Publication: US 2010/0230143
Electrical Interconnect Forming Method
Patent: 8,541,299 →
Application: 12/787,527 →
Publication: US 2010/0230475
Integrated Chip Carrier with Compliant Interconnects
Patent: 8,344,516 →
Application: 12/986,460 →
Publication: US 2011/0101540
Underfill Flow Guide Structures and Method of Using Same
Patent: 8,580,673 →
Application: 13/736,627 →
Publication: US 2013/0122661
Silicon Germanium Heterojunction Bipolar Transistor Structure and Method
Application: 15/236,430 →
Publication: US 2016/0351682
Related Assignments (11)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Jan 14, 2010
From: ZHU, HUILONG; LUO, ZHIJIONG; LIANG, QINGQING; YIN, HAIZHOU
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 023782/0935 →
Assignment of Assignor's Interest Jan 8, 2013
From: DAUBENSPECK, TIMOTHY H.; GAMBINO, JEFFREY P.; MUZZY, CHRISTOPHER D.; PAQUET, MARIE-CLAUDE
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 029589/0420 →
Assignment of Assignor's Interest Aug 13, 2013
From: INTERNATIONAL BUSINESS MACHINES
To: ULTRATECH, INC.
Reel/Frame 031001/0493 →
Assignment of Assignor's Interest Aug 29, 2013
From: INTERNATIONAL BUSINESS MACHINES
To: ULTRATECH, INC.
Reel/Frame 031111/0438 →
Assignment of Assignor's Interest Jan 10, 2014
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: ULTRATECH, INC.
Reel/Frame 031941/0821 →
Assignment of Assignor's Interest Aug 12, 2014
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: ULTRATECH, INC.
Reel/Frame 033519/0066 →
Assignment of Assignor's Interest Apr 5, 2018
From: GLUSCHENKOV, OLEG; KRISHNASAMY, RAJENDRAN; SCHONENBERG, KATHRYN T
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 045446/0747 →
Assignment of Assignor's Interest Jun 25, 2018
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: ULTRATECH, INC.
Reel/Frame 046190/0213 →
Assignment of Assignor's Interest Dec 30, 2019
From: ULTRATECH, INC.
To: VEECO INSTRUMENTS INC.
Reel/Frame 051446/0476 →
Patent Security Agreement Dec 16, 2021
From: VEECO INSTRUMENTS INC.
To: HSBC BANK USA, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 058533/0321 →
Security Interest Jun 16, 2025
From: VEECO INSTRUMENTS INC.
To: HSBC BANK USA, NATIONAL ASSOCIATION
Reel/Frame 071649/0225 →