Patent Assignment
Reel/Frame 065229/0338
Assignment of Assignor's Interest
Recorded: 2023-10-13
Pages: 13
Assignor
RAMBUS INC.
Executed: 2023-09-28
Assignee
K.MIZRA LLC
4921 SW 11TH AVE, CAPE CORAL, FLORIDA, 33914
Covered Properties
(120)
System with dual rail regulated locked loop
Application:
60/408,108 →
Phase-jumping DLL for any phase single-cycle timing-shift
Application:
60/408,063 →
System with dual rail regulated locked loop
Application:
60/436,756 →
Phase jumping locked loop and system with phase jumping locked loop
Application:
60/408,101 →
Phase jumping locked loop and system with phase jumping locked loop
Application:
60/436,745 →
Partial response receiver
Application:
60/461,729 →
Partial Response Receiver
Application:
17/978,468 →
Publication:
US 2023/0140420
Periodic Calibration For Communication Channels By Drift Tracking
Application:
18/138,087 →
Publication:
US 2023/0388028
Communication Channel Calibration for Drift Conditions
Application:
18/078,936 →
Publication:
US 2023/0224101
Strobe-Offset Control Circuit
Application:
18/094,895 →
Publication:
US 2023/0274775
Memory Controller with Skew Compensated Data Transmit Timing
Application:
18/139,176 →
Publication:
US 2023/0335177
Multi-Mode Memory
Application:
11/767,863 →
Publication:
US 2007/0250677
Memory Controller For Micro-Threaded Memory Operations
Memory controller for micro-threaded memory operations
Application:
18/340,810 →
Publication:
US 2023/0376249
Locked Loop with Dual Rail Regulation
System with Dual Rail Regulated Locked Loop
System with Phase Jumping Locked Loop Circuit
System with Phase Jumping Locked Loop Circuit
System with Dual Rail Regulated Locked Loop
Locked Loop with Dual Rail Regulation
Phase Jumping Locked Loop Circuit
High Speed Signaling System with Adaptive Transmit Pre-Emphasis
High Speed Signaling System with Adaptive Transmit Pre-Emphasis and Reflection Cancellation
Offset Cancellation in a Multi-Level Signaling System
Signaling System with Selectively-Inhibited Adaptive Equalization
Signal Receiver with Data Precessing Function
High Speed Signaling System with Adaptive Transmit Pre-Emphasis and Reflection Cancellation
High Speed Signaling System with Adaptive Transmit Pre-Emphasis
High Speed Signaling System with Adaptive Transmit Pre-Emphasis
High Speed Signaling System with Adaptive Transmit Pre-Emphasis
Signaling System with Selectively-Inhibited Adaptive Equalization
High Speed Signaling System with Adaptive Transmit Pre-Emphasis
Locked Loop Circuit with Clock Hold Function
Locked Loop Circuit with Clock Hold Function
Locked Loop Circuit with Clock Hold Function
Locked Loop Circuit with Clock Hold Function
Locked Loop Circuit with Clock Hold Function
Partial Response Receiver
Partial Response Receiver
Partial Response Receiver
Partial Response Receiver with Clock Data Recovery
Partial Response Receiver
Partial Response Receiver
Partial Response Receiver
Equalizing Receiver
Partial Response Receiver
Data-Level Clock Recovery
High Speed Signaling System with Adaptive Transmit Pre-Emphasis
High Speed Signaling System with Adaptive Transmit Pre-Emphasis
High Speed Signaling System with Adaptive Transmit Pre-Emphasis
High Speed Signaling System with Adaptive Transmit Pre-Emphasis
Partial Response Receiver
High Speed Signaling System with Adaptive Transmit Pre-Emphasis
Partial Response Receiver
Partial Response Receiver
High Speed Signaling System with Adaptive Transmit Pre-Emphasis
Partial Response Receiver
High Speed Signaling System with Adaptive Transmit Pre-Emphasis
High Speed Signaling System with Adaptive Transmit Pre-Emphasis
Periodic Calibration for Communication Channels by Drift Tracking
Periodic Calibration for Communication Channels by Drift Tracking
Periodic Calibration for Communication Channels by Drift Tracking
Periodic Calibration for Communication Channels by Drift Tracking
Periodic Calibration for Communication Channels by Drift Tracking
Periodic Calibration For Communication Channels By Drift Tracking
Periodic Calibration for Communication Channels by Drift Tracking
Periodic Calibration For Communication Channels By Drift Tracking
Periodic Calibration For Communication Channels By Drift Tracking
Periodic Calibration For Communication Channels By Drift Tracking
Periodic Calibration For Communication Channels By Drift Tracking
Periodic Calibration For Communication Channels By Drift Tracking
Communication Channel Calibration for Drift Conditions
Communication Channel Calibration for Drift Conditions
Communication Channel Calibration for Drift Conditions
Communication Channel Calibration for Drift Conditions
Communication Channel Calibration for Drift Conditions
Communication Channel Calibration for Drift Conditions
Communication Channel Calibration for Drift Conditions
Communication Channel Calibration for Drift Conditions
Communication Channel Calibration for Drift Conditions
Communication Channel Calibration for Drift Conditions
Communication Channel Calibration for Drift Conditions
Communication Channel Calibration for Drift Conditions
Individual Data Line Strobe-Offset Control in Memory Systems
Individual Data Line Strobe-Offset Control in Memory Systems
Strobe-Offset Control Circuit
Strobe-Offset Control Circuit
Strobe-Offset Control Circuit
Strobe-Offset Control Circuit
Strobe-Offset Control Circuit
Strobe-Offset Control Circuit
Strobe-Offset Control Circuit
Memory Systems with Variable Delays for Write Data Signals
Memory Component with Multiple Delayed Timing Signals
Memory Controller with Multiple Delayed Timing Signals
Memory-Write Timing Calibration Including Generation of Multiple Delayed Timing Signals
Memory Component Having a Write-Timing Calibration Mode
Memory Controller Having a Write-Timing Calibration Mode
Memory Controller Having a Write-Timing Calibration Mode
Memory Module Having a Write-Timing Calibration Mode
Memory Controller with Clock-to-Strobe Skew Compensation
Memory Controller with Clock-to-Strobe Skew Compensation
Memory Controller with Clock-to-Strobe Skew Compensation
Memory Controller with Clock-to-Strobe Skew Compensation
Memory Component That Enables Calibrated Command- and Data-Timing Signal Arrival
Memory Controller with Clock-to-Strobe Skew Compensation
Memory System Component That Enables Clock-to-Strobe Skew Compensation
Micro-threaded memory
Memory Controller for Micro-Threaded Memory Operations
Micro-Threaded Memory
Memory Controller For Micro-Threaded Memory Operations
Data-Level Clock Recovery
High Speed Signaling System with Adaptive Transmit Pre-Emphasis, Reflection Cancellation and Offset Cancellation
PCT:
PCT/US2004/042195 ↗
Partial Response Receiver
PCT:
PCT/US2004/010980 ↗
Data-Level Clock Recovery
PCT:
PCT/US2004/029347 ↗
Communication Channel Calibration for Drift Conditions
PCT:
PCT/US2005/002301 ↗
Individual Data Line Strobe-Offset Control in Memory Systems
PCT:
PCT/US2005/028709 ↗
Memory Systems with Variable Delays for Write Data Signals
PCT:
PCT/US2005/032346 ↗
Micro-Threaded Memory
PCT:
PCT/US2005/042722 ↗
Periodic Calibration for Communication Channels by Drift Tracking
PCT:
PCT/US2005/002139 ↗
Related Assignments
(11)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Mar 22, 2002
From: KIZER, JADE M.; LAU,BENEDICT C.
To: RAMBUS INC.
Reel/Frame 012733/0524 →
Assignment of Assignor's Interest
Feb 25, 2003
From: KIZER, JADE M.; LAU, BENEDICT C.; VU, ROXANNE T.; NGUYEN, HUY M.
To: RAMBUS INC.
Reel/Frame 013823/0194 →
Assignment of Assignor's Interest
Feb 25, 2003
From: KIZER, JADE M.; LAU, BENEDICT C.; HAMPEL, CRAIG E.
To: RAMBUS INC.
Reel/Frame 013823/0115 →
Assignment of Assignor's Interest
Feb 25, 2003
From: KIZER, JADE M.; LAU, BENEDICT C.; VU, ROXANNE T.; HAMPEL, CRAIG E.
To: RAMBUS INC.
Reel/Frame 013819/0050 →
Assignment of Assignor's Interest
May 28, 2003
From: KIZER, JADE M.; LAU, BENEDICT C.; VU, ROXANNE T.; HAMPEL, CRAIG E.
To: RAMBUS INC.
Reel/Frame 014105/0930 →
Assignment of Assignor's Interest
Dec 17, 2003
From: STOJANOVIC, VLADIMIR M.; HO, ANDREW C. C.; BESSIOS, ANTHONY; CHEN, FRED F.
To: RAMBUS INC.
Reel/Frame 014821/0589 →
Assignment of Assignor's Interest
May 21, 2004
From: STOJANOVIC, VLADIMIR M.; HO, ANDREW; BESSIOS, ANTHONY; CHEN, FRED F.
To: RAMBUS INC.
Reel/Frame 015397/0199 →
Assignment of Assignor's Interest
Nov 19, 2019
From: WARE, FREDERICK A.; HAMPEL, CRAIG E.; RICHARDSON, WAYNE S.; BELLOWS, CHAD A.
To: RAMBUS INC
Reel/Frame 051052/0240 →
Assignment of Assignor's Interest
Dec 10, 2022
From: HAMPEL, CRAIG E.; WARE, FREDERICK A.; PEREGO, RICHARD E.
To: RAMBUS INC.
Reel/Frame 062047/0726 →
Assignment of Assignor's Interest
Apr 23, 2023
From: HAMPEL, CRAIG E.; WARE, FREDERICK A.; PEREGO, RICHARD E.
To: RAMBUS INC.
Reel/Frame 063409/0023 →
Assignment of Assignor's Interest
Jun 23, 2023
From: WARE, FREDERICK A.; HAMPEL, CRAIG; RICHARDSON, WAYNE S.; BELLOWS, CHAD A.
To: RAMBUS INC.
Reel/Frame 064050/0333 →