IP Library Granted Patent US 7,471,751
Granted Patent B2
US 7,471,751 · App. 10/872,108 · Granted Dec 30, 2008

Power and area efficient adaptive equalization

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Quick Facts
Patent No.
US 7,471,751
App. No.
10/872,108
Granted
Dec 30, 2008
Kind
B2
Abstract

Methods, apparatuses, and systems are presented for performing channel equalization comprising receiving a signal from a channel associated with inter-symbol interference, processing the received signal to effectively apply a plurality of linearly independent impulse responses to the received signal to produce a plurality of intermediate signals, scaling each of the intermediate signals by each of a plurality of multiplier factors to produce a plurality of scaled signals, and combining the scaled signals to produce a resulting signal corresponding to an equalized version of the received signal in order to reduce effects of inter-symbol interference. Processing of the received signal may comprise providing the received signal to an LCR network comprising a plurality of inductors and a plurality of capacitors and generating, as the intermediate signals, a plurality of inductor signals representing currents through the plurality of inductors and a plurality of capacitor signals representing voltages across the plurality of capacitors.

Claims (23)

1. A method for performing channel equalization comprising:

receiving a signal from a channel associated with inter-symbol interference;

processing the received signal to effectively apply a plurality of linearly independent impulse responses to the received signal to produce a plurality of intermediate signals, the processing comprising providing the received signal to an inductor, capacitor, resistance (LCR) network representing a Bessel filter having a bandwidth within an order of magnitude as a data transmission rate associated with the received signal, the LCR network comprising a plurality of inductors connected in series to form an inductor chain and a plurality of capacitors each connected between a position along the inductor chain and a common position, and generating, as the intermediate signals, a plurality of inductor signals representing currents through the plurality of inductors and a plurality of capacitor signals representing voltages across the plurality of capacitors;

scaling each of the plurality of intermediate signals by each of a plurality of multiplier factors to produce a plurality of scaled signals; and

combining the plurality of scaled signals to produce a resulting signal corresponding to an equalized version of the received signal in order to reduce effects of the inter-symbol interference.

2. The method of claim 1 wherein the LCR network is singly terminated by a resistor connected to one end of the inductor chain.

3. The method of claim 1 wherein the LCR network is doubly terminated by a resistor connected to one end of the inductor chain and another resistor connected to another end of the inductor chain.

4. The method of claim 1 further comprising dynamically adjusting the plurality of multiplier factors to reduce an error measure based on the resulting signal.

5. The method of claim 4 wherein the plurality to multiplier factors are dynamically adjusted according to a least mean square (LMS) algorithm.

6. The method of claim 5 wherein the LMS algorithm utilizes the intermediate signals as gradient signals in dynamically adjusting the plurality multiplier factors.

7. The method of claim 1 wherein the ISI is associated with polarization mode dispersion (PMD), and the equalized signal has reduced effects relating to PMD.

8. The method of claim 1 wherein the plurality of linearly independent impulse responses are orthogonal impulse responses.

9. A apparatus for performing channel equalization comprising:

a plurality of filtering elements configured to respond to a signal received from a channel associated with inter-symbol interference, the plurality of filtering elements characterized by linearly independent impulse responses with respect to the received signal, the plurality of filtering elements capable of producing a plurality of intermediate signals in response to the received signal according to the linearly independent impulse responses, wherein the plurality of filtering elements comprises inductors and capacitors in an inductor, capacitor, resistance (LCR) network representing a Bessel filter having a bandwidth within an order of magnitude as a data transmission rate associated with the received signal, with the plurality of inductors connected in series to form an inductor chain and the plurality of capacitors each connected between a position along the inductor chain and a common position, and wherein the plurality intermediate signals comprise a plurality of inductor signals representing currents through a plurality of inductors and a plurality of capacitor signals representing voltages across a plurality of capacitors;

a plurality of scaling elements configured to scale each of the plurality of intermediate signals by each of a plurality of multiplier factors to produce a plurality of scaled signals; and

a combining node configured to combine the plurality of scaled signals to produce a resulting signal corresponding to an equalized version of the received signal in order to reduce effects of inter-symbol interference.

10. The apparatus of claim 9 wherein the LCR network is singly terminated by a resistor connected to one end of the inductor chain.

11. The apparatus of claim 9 wherein the LCR network is doubly terminated by a resistor connected to one end of the inductor chain and another resistor connected to another end of the inductor chain.

12. The apparatus of claim 9 wherein the plurality of scaling elements are controllable to dynamically adjust the multiplier factors to reduce an error measure based on the resulting signal.

13. The apparatus of claim 12 wherein the plurality multiplier factors are dynamically adjustable according to a least mean square (LMS) algorithm.

14. The apparatus of claim 13 wherein the LMS algorithm utilizes the plurality of intermediate signals as gradient signals to dynamically adjust the plurality of multiplier factors.

15. The apparatus of claim 9 wherein the ISI is associated with polarization mode dispersion (PMD), and the equalized signal has reduced effects relating to PMD.

16. The apparatus of claim 9 wherein the plurality of linearly independent impulse responses are orthogonal impulse responses.

Assignments (27)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
RELEASE OF SECURITY INTEREST Recorded May 29, 2018
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.), INC.; MICROSEMI FREQUENCY AND TIME CORPORATION; MICROSEMI COMMUNICATIONS, INC.; MICROSEMI SOC CORP.; MICROSEMI CORP. - POWER PRODUCTS GROUP; MICROSEMI CORP. - RF INTEGRATED SOLUTIONS
Reel/Frame 046251/0391 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 22, 2017
From: MICROSEMI COMMUNICATIONS, INC.
To: MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 042523/0577 →
PATENT SECURITY AGREEMENT Recorded Feb 3, 2016
From: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC. (F/K/A LEGERITY, INC., ZARLINK SEMICONDUCTOR (V.N.) INC., CENTELLAX, INC., AND ZARLINK SEMICONDUCTOR (U.S.) INC.); MICROSEMI FREQUENCY AND TIME CORPORATION (F/K/A SYMMETRICON, INC.); MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION); MICROSEMI SOC CORP. (F/K/A ACTEL CORPORATION); MICROSEMI CORP. - POWER PRODUCTS GROUP (F/K/A ADVANCED POWER TECHNOLOGY INC.); MICROSEMI CORP. - RF INTEGRATED SOLUTIONS (F/K/A AML COMMUNICATIONS, INC.)
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037691/0697 →
RELEASE OF SECURITY INTEREST Recorded Jan 19, 2016
From: BANK OF AMERICA, N.A.
To: MICROSEMI CORPORATION; MICROSEMI CORP.-ANALOG MIXED SIGNAL GROUP, A DELAWARE CORPORATION; MICROSEMI SOC CORP., A CALIFORNIA CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC., A DELAWARE CORPORATION; MICROSEMI FREQUENCY AND TIME CORPORATION, A DELAWARE CORPORATION; MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION), A DELAWARE CORPORATION; MICROSEMI CORP.-MEMORY AND STORAGE SOLUTIONS (F/K/A WHITE ELECTRONIC DESIGNS CORPORATION), AN INDIANA CORPORATION
Reel/Frame 037558/0711 →
MERGER AND CHANGE OF NAME Recorded May 13, 2015
From: VITESSE SEMICONDUCTOR CORPORATION; LLIU100 ACQUISITION CORP.
To: MICROSEMI COMMUNICATIONS, INC.
Reel/Frame 035651/0708 →
SUPPLEMENTAL SECURITY AGREEMENT Recorded Apr 29, 2015
From: MICROSEMI COMMUNICATIONS, INC.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 035532/0925 →
RELEASE OF SECURITY INTEREST Recorded Apr 28, 2015
From: WHITEBOX VSC, LTD.
To: VITESSE SEMICONDUCTOR CORPORATION
Reel/Frame 035526/0090 →
RELEASE OF SECURITY INTEREST Recorded Nov 5, 2014
From: US BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: VITESSE SEMICONDUCTOR CORPORATION
Reel/Frame 034176/0162 →
SECURITY AGREEMENT Recorded Dec 9, 2009
From: VITESSE SEMICONDUCTOR CORPORATION
To: WHITEBOX VSC, LTD.
Reel/Frame 023627/0079 →
COLLATERAL ASSIGNMENT (INTELLECTUAL PROPERTY) Recorded Nov 5, 2009
From: VITESSE SEMICONDUCTOR CORPORATION
To: U.S. BANK NATIONAL ASSOCIATION
Reel/Frame 023471/0267 →
RELEASE OF SECURITY INTEREST Recorded Oct 29, 2009
From: OBSIDIAN, LLC
To: VITESSE SEMICONDUCTOR CORPORATION; VLTESSE INTERNATIONAL, INC.; VITESSE MANUFACTURING & DEVELOPMENT CORPORATION; VITESSE SEMICONDUCTOR SALES CORPORATION
Reel/Frame 023438/0587 →
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2009
From: OBSIDIAN, LLC
To: VITESSE SEMICONDUCTOR CORPORATION
Reel/Frame 023373/0053 →
SECURITY AGREEMENT Recorded Jun 29, 2006
From: VITESSE SEMICONDUCTOR CORPORATION
To: OBSIDIAN, LLC, AS COLLATERAL AGENT
Reel/Frame 017846/0847 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2005
From: INFINERA ACQUISITION CORPORATION
To: VITESSE SEMICONDUCTOR CORPORATION
Reel/Frame 016851/0823 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 16, 2005
From: BIG BEAR NETWORKS, INC.
To: INFINERA ACQUISITION CORPORATION
Reel/Frame 016789/0960 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2004
From: PAVAN, SHANTHI
To: BIG BEAR NETWORKS; INDIAN INSTITUTE OF TECHNOLOGY
Reel/Frame 015498/0203 →