IP Library Granted Patent US 10,508,030
Granted Patent B2
US 10,508,030 · App. 15/920,759 · Granted Dec 17, 2019

Seal for microelectronic assembly

Inventors: Rajesh Katkar (San Jose, CA); Liang Wang (Milpitas, CA); Cyprian Emeka Uzoh (San Jose, CA); Shaowu Huang (Sunnyvale, CA); Guilian Gao (San Jose, CA); Ilyas Mohammed (Santa Clara, CA)
Assignee: Invensas Bonding Technologies, Inc.
B81C1/00333B81B7/0032B81B7/0074B81C1/00261B81C1/00269H01L23/02H01L23/04H01L23/053H01L23/10B81C2203/038
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Quick Facts
Patent No.
US 10,508,030
App. No.
15/920,759
Filed
Mar 14, 2018
Granted
Dec 17, 2019
Kind
B2
Art Unit
2893
USPC
257/415
Abstract

Representative implementations of techniques and devices provide seals for sealing the joints of bonded microelectronic devices as well as bonded and sealed microelectronic assemblies. Seals are disposed at joined surfaces of stacked dies and wafers to seal the joined surfaces. The seals may be disposed at an exterior periphery of the bonded microelectronic devices or disposed within the periphery using the various techniques.

Claims (21)

1. A method of forming a microelectronic assembly, comprising:

bonding a first insulating surface of a first microelectronic component to a second insulating surface of a second microelectronic component, the first insulating surface and the second insulating surface forming a bond joint where the first insulating surface and the second insulating surface make contact; and

forming a seal over the bond joint, the seal covering the bond joint, the seal comprising a metallic material and sealing the bond joint between the first microelectronic component and the second microelectronic component.

2. The method of claim 1 , further comprising forming the seal by depositing the metallic material over the bond joint via electroless plating or printing.

3. The method of claim 1 , further comprising forming the seal to be continuous over a periphery of at least one of the first microelectronic component and the second microelectronic component.

4. The method of claim 1 , wherein the bond joint comprises a first bond joint and the seal comprises a first seal, the method further comprising bonding at least one of the first insulating surface and the second insulating surface to a third insulating surface, forming at least a second bond joint where the third insulating surface makes contact with the first insulating surface or the second insulating surface; and

forming a second seal over the second bond joint, the second seal covering the second bond joint, the second seal comprising a metallic material and sealing the second bond joint.

5. The method of claim 4 , wherein the second seal comprises a portion of the first seal, the method further comprising forming the first seal over the first and second bond joints, the first seal covering the first and second bond joints and sealing the first and second bond joints.

6. The method of claim 1 , wherein the first insulating surface is bonded to the second insulating surface using an adhesive-less, room temperature, covalent bonding technique.

7. The method of claim 1 , wherein the first insulating surface is bonded to the second insulating surface using a die attach film or paste via a polymeric bonding technique.

8. The method of claim 1 , wherein the seal comprises a hermetic seal arranged to prevent fluid leakage at the bond joint greater than 1×10 −6 atm-cm3 per second.

9. A method of forming a microelectronic assembly, comprising:

bonding a first insulating surface of a first microelectronic component to a second insulating surface of a second microelectronic component, the first insulating surface and the second insulating surface forming a bond joint where the first insulating surface and the second insulating surface make contact;

forming a first channel in the first insulating surface;

forming a second channel through the second microelectronic component, the second channel aligned with the first channel, the first channel and the second channel intersecting the bond joint;

forming a seal within the first channel and the second channel, the seal being continuous from the first channel to the second channel, the seal comprising a metallic material and sealing the bond joint between the first microelectronic component and the second microelectronic component.

10. The method of claim 9 , further comprising forming the seal by depositing the metallic material at the bond joint via electroless plating.

11. The method of claim 9 , further comprising conforming the metallic material to multiple surfaces of the first channel and the second channel.

12. The method of claim 9 , further comprising forming the seal to be continuous within a periphery of at least one of the first microelectronic component and the second microelectronic component.

13. The method of claim 9 , further comprising decreasing fluid flow across the bond joint by forming the seal within the first channel and the second channel.

14. The method of claim 9 , wherein the seal comprises a hermetic seal arranged to prevent fluid leakage at the bond joint greater than 1×10 −6 atm-cm3 per second.

Assignments (3)
CHANGE OF NAME Recorded Nov 19, 2025
From: INVENSAS BONDING TECHNOLOGIES, INC.
To: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
Reel/Frame 073635/0465 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 24, 2018
From: KATKAR, RAJESH; WANG, LIANG; UZOH, CYPRIAN EMEKA; HUANG, SHAOWU; GAO, GUILIAN; MOHAMMED, ILYAS
To: INVENSAS BONDING TECHNOLOGIES, INC.
Reel/Frame 046444/0920 →
Cited By (51)
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