IP Library Granted Patent US 12,362,301
Granted Patent B2
US 12,362,301 · App. 17/406,758 · Granted Jul 15, 2025

Bonded memory devices and methods of making the same

Inventors: Adarsh Rajashekhar (Santa Clara, CA); Raghuveer S. Makala (Campbell, CA); Joyeeta Nag (San Jose, CA)
Assignee: Sandisk Technologies, Inc.
H01L24/08H01L24/80H01L25/0657H01L25/50H01L2224/08145H01L2224/80006H01L2224/80895H01L2924/1441
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Quick Facts
Patent No.
US 12,362,301
App. No.
17/406,758
Granted
Jul 15, 2025
Kind
B2
Abstract

A memory device includes a first electrically conductive line laterally extending along a first horizontal direction, a memory pillar structure overlying and contacting the first electrically conductive line, the memory pillar structure includes a vertical stack of a ferroelectric material plate and a selector material plate, and a second electrically conductive line laterally extending along a second horizontal direction and overlying and contacting the memory pillar structure.

Claims (31)

1. A memory device, comprising:

a first electrically conductive line laterally extending along a first horizontal direction;

a memory pillar structure overlying and contacting the first electrically conductive line, wherein the memory pillar structure comprises a ferroelectric material plate, a selector material plate, and a bonded pair of a first metallic material plate and a second metallic material plate with a bonding interface at which a first metallic material of the first metallic material plate and a second metallic material of the second metallic material plate are bonded to each other, wherein the first metallic material is selected from a first elemental metal, TiN, TaN, WN, or MON, and the second metallic material plate consists essentially of the second metallic material that is selected from a second elemental metal, TiN, TaN, or WN, wherein the first metallic material of the first metallic material plate is in direct contact with the selector material plate, and the second metallic material of the second metallic material plate is in direct contact with the ferroelectric material plate; and

a second electrically conductive line laterally extending along a second horizontal direction and overlying and contacting the memory pillar structure.

2. The memory device of claim 1 , wherein the selector material plate comprises a tunneling dielectric plate.

3. The memory device of claim 1 , wherein:

the tunneling dielectric plate comprises a material selected from magnesium oxide, aluminum oxide, or a spinel material; and

the tunneling dielectric plate has a thickness in a range from 0.3 nm to 3.0 nm.

4. The memory device of claim 1 , wherein the selector material plate comprises an ovonic threshold switch material or a diode threshold switch material that comprises one of a p-n semiconductor diode, a p-i-n semiconductor diode, a Schottky diode, or a metal-insulator-metal diode.

5. The memory device of claim 4 , further comprising:

a lower electrode plate contacting a bottom surface of the selector material plate and comprising a first non-metallic conductive material; and

an upper electrode plate contacting a top surface of the selector material plate and comprising a second non-metallic conductive material.

6. The memory device of claim 5 , wherein each of the first non-metallic conductive material and the second non-metallic conductive material is selected from amorphous carbon, amorphous boron-doped carbon, amorphous nitrogen-doped carbon, amorphous silicon, amorphous germanium, alloys thereof, or layer stacks thereof.

7. The memory device of claim 1 , wherein the ferroelectric material plate comprises a single crystalline single crystalline ferroelectric material plate in which an entirety of a ferroelectric material is single crystalline.

8. The memory device of claim 7 , wherein the single crystalline single crystalline ferroelectric material plate comprises a single crystalline ferroelectric material having a Wurtzite crystalline structure.

9. The memory device of claim 8 , wherein the single crystalline ferroelectric material comprises Al 1-x Sc x N, where 0.25<x<0.45.

10. The memory device of claim 8 , wherein the single crystalline ferroelectric material comprises at least one material selected from Al 1-y B y N where 0.02≤x≤0.15, MgS, MgSe, AlN, GaN, MgSiN 2 , MgGeN 2 , MgSnN 2 , ZnSiN 2 , ZnGeN 2 , ZnSnN 2 , MnGeN 2 , LiSi 2 N 3 , LiGe 2 N 3 , Zn 2 TaN 3 , Zn 2 NbN 3 , Zn 2 SbN 3 , Mg 2 SbN 3 , Zn 3 MoN 4 , Zn 3 WN 4 , Mg 3 MoN 4 , or Mg 3 WN 4 .

11. The memory device of claim 1 , wherein sidewalls of the first metallic material plate, sidewalls of the second metallic material plate, sidewalls of the ferroelectric material plate, and sidewalls of the selector material plate are vertically coincident with each other.

12. The memory device of claim 1 , wherein:

the bonded pair of the first metallic material plate and the second metallic material plate are disposed between the selector material plate and the ferroelectric material plate; and

the ferroelectric material plate is in direct contact with the bonded pair.

13. The memory device of claim 1 , wherein the bonded pair of the first metallic material plate and the second metallic material plate is located between the ferroelectric material plate and the selector material plate.

14. The memory device of claim 1 , wherein the first metallic material plate is in direct contact with the ferroelectric material plate.

15. The memory device of claim 1 , further comprising a metallic cap plate in direct contact with the ferroelectric material plate and located on an opposite side of the bonded pair relative to the ferroelectric material plate.

16. The memory device of claim 15 , wherein:

the metallic cap plate comprises a material selected from an elemental metal, an intermetallic alloy, a conductive metallic nitride material, a conductive metallic carbide material, and a conductive carbon-based material; and

the metallic cap plate contacts one of the first electrically conductive line and the second electrically conductive line.

17. The memory device of claim 1 , wherein the first metallic material consists essentially of the first elemental metal, and the second metallic material consists essentially of the second elemental metal.

18. The memory device of claim 17 , wherein the first metallic material of the first metallic material plate and the second metallic material of the second metallic material plate are bonded to each at the bonding interface other via metal-to-metal bonding.

19. The memory device of claim 1 , wherein the first metallic material is selected from the TIN, TaN, WN, or MoN.

20. The memory device of claim 1 , wherein the second metallic material is selected from the TiN, TaN, or WN.

Assignments (4)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2024
From: SANDISK TECHNOLOGIES LLC
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 069796/0423 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 19, 2021
From: RAJASHEKHAR, ADARSH; MAKALA, RAGHUVEER S; NAG, JOYEETA
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 057233/0016 →
Continuity (2)
Continuation In Part 16913717 · Jun 26, 2020
Related Publication 20210407943A1 · Dec 30, 2021
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