Multicore processor with each core having independent floating point datapath and integer datapath
Described herein is a general-purpose graphics processing unit including a multiprocessor having a single instruction, multiple thread, SIMT, architecture. The multiprocessor comprises multiple sets of compute units each having a first logic unit configured to perform floating-point operations and a second logic unit configured to perform integer operations, with a thread of the floating-point instruction being executed in parallel with a thread of the integer instruction.
1. A general-purpose graphics processing unit including:
a processing cluster including a plurality of multiprocessors interconnected via a data crossbar configured to enable exchange of data between the plurality of multiprocessors directly via the data crossbar, from a first multiprocessor of the plurality of multiprocessors to a second multiprocessor of the plurality of multiprocessors, the plurality of multiprocessors having a single instruction, multiple thread, SIMT, architecture, wherein a multiprocessor of the plurality of multiprocessors comprises:
multiple sets of compute units, each compute unit in each set of compute units having a first logic unit configured to perform floating-point operations and a second logic unit configured to perform integer operations; and
a memory coupled with the multiple sets of compute units, wherein in a compute unit of the multiple sets of compute units, the first logic unit is to execute a thread of a floating-point instruction to perform one or more of the floating-point operations, the one or more of the floating-point operations include a 64-bit floating-point operation, and the second logic unit is to execute a thread of an integer instruction to perform one or more of the integer operations, the thread of the floating-point instruction being executed in parallel with the thread of the integer instruction.
2. The general-purpose graphics processing unit as in claim 1 , wherein the memory is shared between the multiple sets of compute units.
3. The general-purpose graphics processing unit as in claim 2 , wherein the memory includes a data cache accessible by the multiple sets of compute units.
4. The general-purpose graphics processing unit as in claim 1 , wherein the floating-point instruction is to indicate to the multiprocessor to perform multiple cycles of a multi-dimensional floating-point operation in response to the floating-point instruction.
5. The general-purpose graphics processing unit as in claim 4 , wherein the multi-dimensional floating-point operation is a two-dimensional matrix multiply operation.
6. The general-purpose graphics processing unit as in claim 5 , wherein the two-dimensional matrix multiply operation additionally includes an add operation.
7. The general-purpose graphics processing unit as in claim 1 , additionally including a scheduler to schedule at least one thread of the floating-point instruction and at least one thread of the integer instruction to the compute unit of the multiple sets of compute units.
8. The general-purpose graphics processing unit as in claim 7 , the scheduler to independently schedule multiple threads of each of the floating-point instruction and the integer instruction.
9. The general-purpose graphics processing unit as in claim 8 , wherein threads of the floating-point instruction and the integer instruction have independent thread state.
10. The general-purpose graphics processing unit as in claim 1 further comprising: a geometry processing unit to execute geometry shader program code to transform graphics primitives.
11. The general-purpose graphics processing unit as in claim 10 wherein the geometry processing unit is to subdivide the graphics primitives into one or more new graphics primitives.
12. The general-purpose graphics processing unit as in claim 11 further comprising: a rasterizer to perform fixed-function triangle rasterization to generate pixels.
13. A general-purpose graphics processing unit including:
a processing cluster including a plurality of multiprocessors interconnected via a data crossbar configured to enable exchange of data between the plurality of multiprocessors directly via the data crossbar, from a first multiprocessor of the plurality of multiprocessors to a second multiprocessor of the plurality of multiprocessors, the plurality of multiprocessors having a single instruction, multiple thread, SIMT, architecture, wherein a multiprocessor of the plurality of multiprocessors comprises:
multiple sets of compute units, each compute unit in each set of compute units having a first logic unit configured to perform floating-point operations and a second logic unit configured to perform integer operations;
a memory coupled with the multiple sets of compute units, wherein in a compute unit of the multiple sets of compute units, the first logic unit is to execute a thread of a floating-point instruction to perform one or more of the floating-point operations, the one or more of the floating-point operations include a 64-bit floating-point operation, and the second logic unit is to execute a thread of an integer instruction to perform one or more of the integer operations, the thread of the floating-point instruction being executed in parallel with the thread of the integer instruction;
a geometry processing unit coupled to the multiprocessor, the geometry processing unit to execute geometry shader program code to transform graphics primitives; and
a rasterizer coupled to the geometry processing unit to perform triangle rasterization to generate pixel data.
14. The general-purpose graphics processing unit as in claim 13 , wherein the memory is shared between the multiple sets of compute units.
15. The general-purpose graphics processing unit as in claim 14 , wherein the memory includes a data cache accessible by the multiple sets of compute units.
16. The general-purpose graphics processing unit as in claim 13 , wherein the floating-point instruction is to indicate to the multiprocessor to perform multiple cycles of a multi-dimensional floating-point operation in response to the floating-point instruction.
17. The general-purpose graphics processing unit as in claim 16 , wherein the multi-dimensional floating-point operation is a two-dimensional matrix multiply operation.
18. The general-purpose graphics processing unit as in claim 17 , wherein the two-dimensional matrix multiply operation additionally includes an add operation.
19. The general-purpose graphics processing unit as in claim 13 , additionally including a scheduler to schedule at least one thread of the floating-point instruction and at least one thread of the integer instruction to the compute unit of the multiple sets of compute units.
20. The general-purpose graphics processing unit as in claim 19 , the scheduler to independently schedule multiple threads of each of the floating-point instruction and the integer instruction.
21. The general-purpose graphics processing unit as in claim 20 , wherein threads of the floating-point instruction and the integer instruction have independent thread state.