Granted Patent B2

US 12,598,929 · App. 17/905,104 · Granted Apr 7, 2026

Inventors: Andreas Fischer (Castro Valley, CA); Aaron Lynn Routzahn (Fremont, CA); Thorsten Bernd Lill (Kalaheo, HI); Seshasayee Varadarajan (Lake Oswego, OR)

Assignee: Lam Research Corporation

H01L21/31116C23F1/02H01J37/32357H01J37/32522H01L21/32136H01L21/32138H01L21/67207H01J2237/2001H01J2237/332H01J2237/334H01L21/67167H10B69/00

Abstract

Claims (21)

1 . A method of etching a molybdenum layer on a semiconductor substrate, the method comprising:

pre-coating a process chamber for housing a semiconductor substrate with silicon tetrachloride; and

performing a single etch cycle to controllably remove between about 8 Å to about 15 Å of the molybdenum layer, the single etch cycle comprising:

(a) exposing the semiconductor substrate to an oxygen-containing reactant to oxidize at least a portion of the molybdenum layer to molybdenum oxide,

(b) after the molybdenum oxide has formed, exposing the semiconductor substrate to boron trichloride to convert the molybdenum oxide to volatile molybdenum oxychloride while forming boron oxide on the semiconductor substrate, and

(c) exposing the semiconductor substrate to a fluorine-containing reactant to remove the boron oxide from the semiconductor substrate,

wherein steps (a)-(c) are performed in an absence of plasma and at a temperature ranging from about 400° C. to about 600° C.

2 . The method of claim 1 , wherein etching of molybdenum layer by the steps (a)-(c) is isotropic.

3 . The method of claim 1 , wherein the oxygen-containing reactant is selected from the group consisting of O 2 and O 3 .

4 . The method of claim 1 , wherein the fluorine-containing reactant is HF.

5 . The method of claim 1 , wherein the molybdenum layer is etched from sidewalls of a recessed feature on the semiconductor substrate.

6 . The method of claim 1 , wherein the molybdenum layer is etched during wordline isolation in fabrication of a 3D NAND structure.

7 . The method of claim 1 , wherein the method comprises performing between about 2-50 etch cycles, and wherein each etch cycle includes the steps (a)-(c).

8 . The method of claim 1 , wherein the steps (a)-(c) are performed in one process chamber.

9 . The method of claim 1 , wherein the steps (a)-(c) are performed in one process chamber, and wherein the method further comprises purging the process chamber after each of the steps (a), (b), and (c).

10 . The method of claim 1 , further comprising the steps of:

applying photoresist to the semiconductor substrate;

exposing the photoresist to light;

patterning the photoresist and transferring the pattern to the semiconductor substrate; and

selectively removing the photoresist from the semiconductor substrate.

11 . The method of claim 1 , wherein the oxygen-containing reactant and boron trichloride and fluorine-containing reactant are delivered to a process chamber housing the semiconductor substrate without a carrier gas.

Assignments (1)

Continuity (2)

References Cited (374)