IP Library › Assignment 036615/0885
Patent Assignment
Reel/Frame 036615/0885

Assignment of Assignor's Interest

Recorded: 2015-09-15 Received: 2015-09-15 Pages: 12
Assignor
INFINEON TECHNOLOGIES AG
Executed: 2015-07-08
Assignee
POLARIS INNOVATIONS LIMITED
29 EARLSFORT TERRACE, DUBLIN 2, DUBLIN, IEX, IRELAND
Covered Properties (99)
Method of Facilitating User Preference in Creative Design of a Controller
Application: 14/155,013 →
User-Configurable Casing for Manual Controller
Application: 13/347,414 →
Manual Controller Configurable by User Arrangement of Matable Building Elements
Application: 12/795,540 →
Configurable Manual Controller
Application: 12/278,102 →
Electronic Component with Semiconductor Chips, Electronic Assembly Composed of Stacked Semiconductor Chips, and Methods for Producing an Electronic Component and an Electronic Assembly
Application: 11/928,941 →
Configurable Manual Controller
Placement System for Populating a Substrate with Electronic Components
Application: 11/348,762 →
Method and Apparatus for Storing and Reading Information in a Ferroelectric Material
Application: 11/034,219 →
Photolithographic Patterning Process Using a Carbon Hard Mask Layer of Diamond-Like Hardness Produced by a Plasma-Enhanced Deposition Process
Application: 10/494,063 →
Method for Producing an Electronic Device Connected to a Printed Circuit Board
Application: 11/008,081 →
Method of Producing an Integrated Circuit Arrangement with Field-Shaping Electrical Conductor
Application: 10/945,275 →
Method for Fabricating a Vertical Transistor in a Trench, and Vertical Transistor
Application: 10/484,562 →
Method for Fabricating a Semiconductor Product with a Memory Area and a Logic Area
Application: 10/485,308 →
Method for the Formation of Contact Holes for a Number of Contact Regions for Components Integrated in a Substrate
Application: 10/479,733 →
Microelectronic Structure Having a Hydrogen Barrier Layer
Application: 10/476,579 →
Semiconductor Device Identification Apparatus
Application: 10/816,142 →
Semiconductor Memory Having Mutually Crossing Word and Bit Lines at Which Magnetoresistive Memory Cells Are Arranged
Application: 10/815,840 →
Method for Forming an Soi Substrate, Vertical Transistor and Memory Cell with Vertical Transistor
Application: 10/792,691 →
Memory Cell
Application: 10/779,557 →
Fin Field-Effect Transistor and Method for Producing a Fin Field Effect-Transistor
Application: 10/768,971 →
Magnetic Memory Unit and Magnetic Memory Array
Application: 10/754,910 →
Method for Determining the Optimum Access Strategy
Application: 10/717,337 →
Magnetic Memory Configuration
Application: 10/715,023 →
Method for Populating a Substrate with Electronic Components
Application: 10/700,087 →
Semiconductor Memory Component
Application: 10/692,636 →
Substrate with Semiconductor Layer, Electronic Component, Electronic Circuit, Printable Composition and Method for Production Thereof
Application: 10/432,767 →
Compact semiconductor structure
Application: 10/432,770 →
Method for Fabricating Ferroelectric Memory Cells
Application: 10/669,072 →
Memory cell arrangement and method of fabricating it
Application: 10/343,844 →
Method for Fabricating an Electrode Arrangement for Charge Storage
Application: 10/631,554 →
Apparatus and Method for Calibrating Signals
Application: 10/618,056 →
Method for Fabricating Trench Capacitors for Integrated Semiconductor Memories
Application: 10/616,396 →
Method for on-Demand Generation of Individual Random Numbers of a Sequence of Random Numbers of a 1/F Noise
Application: 10/601,537 →
Semiconductor Product Container and System for Handling a Semiconductor Product Container
Application: 10/601,639 →
Circuit Configuration for Driving a Programmable Link
Application: 10/600,911 →
Circuit Configuration for Driving a Programmable Link
Application: 10/600,408 →
Circuit Configuration for Level Boosting, in Particular for Driving a Programmable Link
Application: 10/600,916 →
Circuit Configuration for Driving a Programmable Link
Application: 10/601,236 →
Apparatus and Method for Detecting an Amount of Depolarization of a Linearly Polarized Beam
Application: 10/457,706 →
Circuit for Non-Destructive, Self-Normalizing Reading-Out of Mram Memory Cells
Application: 10/447,358 →
Photolithographic Mask and Methods for Producing a Structure and of Exposing a Wafer in a Projection Apparatus
Application: 10/438,370 →
Circuit Configuration for Generating a Controllable Output Voltage
Application: 10/438,362 →
Method for Exposing a Semiconductor Wafer
Application: 10/435,449 →
Process and Device for Cleaning a Semiconductor Wafer
Application: 10/424,173 →
Configuration for Transporting a Semiconductor Wafer Carrier
Application: 10/424,174 →
Method for Fabricating an Integrated Circuit
Application: 10/399,985 →
Memory Element and Method for Fabricating a Memory Element
Application: 10/275,598 →
Configuration for Polishing Disk-Shaped Objects
Application: 10/403,880 →
Method for Producing a Semiconductor Wafer, Semiconductor Chip, and Intermediate Semiconductor Product
Application: 10/402,811 →
Vehicle for Transporting a Semiconductor Device Carrier to a Semiconductor Processing Tool
Application: 10/401,193 →
Testing Device and Method for Establishing the Position of a Notch or Bump on a Disk
Application: 10/388,026 →
Method for Fabricating a Memory Cell
Application: 10/377,350 →
Low-Temperature Processing of a Ferroelectric Strontium Bismuth Tantalate Layer, and Fabrication of Ferroelectric Components Using the Layer
Application: 10/372,983 →
Method for Fabricating a Component, and Component Having a Metal Layer and an Insulation Layer
Application: 10/370,858 →
Method for Wafer Position Data Retrieval in Semiconductor Wafer Manufacturing
Application: 10/368,073 →
Method for Checking an Integrated Electrical Circuit
Application: 10/368,334 →
Integrated Circuit with Temperature Sensor and Method for Heating the Circuit
Application: 10/352,824 →
Method for Manufacturing a Multi-Bit Memory Cell
Application: 10/352,826 →
Integrated Test Circuit
Application: 10/317,933 →
Improved Refreshing Scheme for Memory Cells a Memory Array to Increase Performace of Integrated Circuits
Application: 10/065,213 →
Electronic Component with at Least One Semiconductor Chip and Method for Producing the Electronic Component
Application: 10/236,895 →
Method of Analyzing an Integrated Electric Circuit, Computer Program Utilizing the Method, Data Carrier Including the Method, and Method for Downloading the Program
Application: 10/215,453 →
Process for the Electrochemical Oxidation of a Semiconductor Substrate
Application: 10/215,151 →
Electronic Component with a Semiconductor Chip and Method for Producing the Electronic Component
Application: 10/205,081 →
Integrated Semiconductor Circuit Having Contact Points and Configuration Having at Least Two Such Circuits
Application: 10/200,933 →
Connection of Packaged Integrated Memory Chips to a Printed Circuit Board
Application: 10/197,793 →
Method of Producing Conductive or Semiconducting Structured Polymers
Application: 10/191,995 →
A Semiconductor Chip Configuration with a Layer Sequence with Functional Elements Contacted by Contact Pads
Application: 10/187,766 →
Method for Checking a Conductive Connection Between Contact Points
Application: 10/185,629 →
Method for Assessing the Quality of a Memory Unit
Application: 10/185,282 →
Composition and Process for the Production of a Porous Layer Using the Composition
Application: 10/180,438 →
Integrated Memory Having a Memory Cell Array with a Plurality of Segments and Method for Operating the Integrated Memory
Application: 10/166,962 →
Semiconductor Device with Self-Aligned Contact and Method for Manufacturing the Device
Application: 10/166,963 →
Semiconductor Chip, Memory Module and Method for Testing the Semiconductor Chip
Application: 10/159,848 →
Semiconductor Memory with a Signal Path
Application: 10/158,275 →
Antireflective, Layer-Forming Composition, Layer Configuration Containing the Antireflective Layer, and Process for Producing the Antireflective Layer
Application: 10/154,297 →
Method for Fabricating an Integrated Semiconductor Circuit Having a Strongly Polarizable Dielectric or Ferroelectric
Application: 10/154,340 →
Semiconductor Memory and Method for Operating the Semiconductor Memory
Application: 10/154,597 →
Method for the Hybrid-Automated Monitoring of Production Machines
Application: 10/139,166 →
Production Machine with Capability of Transmitting Production Information and Method for Generating Events Regarding Production Information While Operating the Production Machine
Application: 10/139,167 →
Light Guide Configuration for Serial Bi-Directional Signal Transmission, Optical Circuit Board, and Fabrication Method
Application: 10/138,655 →
Sheet-Like Electrooptical Component, Light-Guide Configuration for Serial, Bidirectional Signal Transmission and Optical Printed Circuit Board
Application: 10/137,906 →
Method for Structuring a Photoresist Layer
Application: 10/134,888 →
Photoresist Compound and Method for Structuring a Photoresist Layer
Application: 10/133,620 →
Semiconductor Device and Production Process
Application: 10/133,336 →
Electronic Component with Semiconductor Chips, Electronic Assembly Composed of Stacked Semiconductor Chips, and Methods for Producing an Electronic Component and an Electronic Assembly
Application: 10/132,826 →
Circuit Configuration for Enabling a Clock Signal in a Manner Dependent on an Enable Signal
Application: 10/125,088 →
Integrated Clock Generator, Particularly for Driving a Semiconductor Memory with a Test Signal
Application: 10/119,607 →
Dynamic Semiconductor Memory with Refresh and Method for Operating Such a Memory
Application: 10/112,521 →
Configuration Having an Electronic Device Electrically Connected to a Printed Circuit Board
Application: 10/105,467 →
Configuration for Testing an Integrated Semiconductor Memory and Method for Testing the Memory
Application: 10/106,591 →
Semiconductor Memory with Refresh and Method for Operating the Semiconductor Memory
Application: 10/105,547 →
Method for Producing a Memory Cell for a Semiconductor Memory
Application: 10/096,459 →
Method for Producing a Cell of a Semiconductor Memory
Application: 10/096,473 →
Integrated Memory and Method for Testing and Repairing the Integrated Memory
Application: 10/091,076 →
Electronic Component with Stacked Semiconductor Chips
Application: 10/090,289 →
Method for Operating an Integrated Memory Unit Partitioned by an External Control Signal
Application: 10/082,556 →
Test System for Conducting a Function Test of a Semiconductor Element on a Wafer, and Operating Method
Application: 10/076,977 →
Method for Producing an Alternating Phase Mask
Application: 10/075,540 →