IP Library Assignment 049732/0121
Patent Assignment
Reel/Frame 049732/0121

Assignment of Assignor's Interest

Recorded: 2019-07-12 Pages: 11
Assignor
POWERCHIP TECHNOLOGY CORPORATION
Executed: 2019-06-28
Assignee
POWERCHIP SEMICONDUCTOR MANUFACTURING CORPORATION
NO. 18, LI-HSIN RD. 1, HSINCHU SCIENCE PARK,, HSINCHU, TAIWAN
Covered Properties (20)
Method of Manufacturing High Coupling Ratio Flash Memory Having Sidewall Spacer Floating Gate Electrode
Patent: 6,875,660 →
Application: 10/248,867 →
Publication: US 2004/0166641
Flash Memory with Self-Aligned Split Gate and Methods for Fabricating and for Operating the Same
Patent: 6,765,260 →
Application: 10/249,024 →
Flash memory cell including two floating gates and an erasing gate
Patent: 6,855,598 →
Application: 10/249,059 →
Publication: US 2004/0180495
Method for Automatically Controlling Defect -Specification in a Semiconductor Manufacturing Process
Patent: 6,807,454 →
Application: 10/249,103 →
Publication: US 2003/0212469
An Exhaust Gas Processing Apparatus
Patent: 6,605,141 →
Application: 10/249,104 →
An Automatic Intelligent Yield Improving and Process Parameter Multivariate System and the Anaysis Method Thereof
Patent: 7,079,677 →
Application: 10/249,148 →
Publication: US 2004/0001619
Method for Producing a Gate
Patent: 6,699,755 →
Application: 10/249,212 →
Method for Analyzing Wafer Test Parameters
Patent: 6,968,280 →
Application: 10/249,213 →
Publication: US 2004/0193381
Method of Fabricating Flash Memory
Patent: 6,635,533 →
Application: 10/249,256 →
Flash Memory Device Structure and Manufacturing Method Thereof
Patent: 6,770,934 →
Application: 10/249,362 →
Flash Memory Structure and Operating Method Thereof
Patent: 6,774,428 →
Application: 10/249,363 →
Complex Multivariate Analysis System and Method
Patent: 6,904,384 →
Application: 10/249,375 →
Publication: US 2004/0199358
Semiconductor Automation System for a Daily Check and Method Thereof
Patent: 6,766,213 →
Application: 10/249,586 →
Publication: US 2004/0122548
Method of Sampling Contaminants of a Semiconductor Wafer Carrier
Patent: 6,923,188 →
Application: 10/249,672 →
Publication: US 2004/0216766
Non-Volatile Memory Cell Structure and Method for Manufacturing Thereof
Patent: 6,737,700 →
Application: 10/249,864 →
Half-Tone Phase Shift Mask and Patterning Method Using Thereof
Patent: 7,461,472 →
Application: 10/250,228 →
Publication: US 2004/0253522
[Front Opening Unified Pod and Associated Method for Preventing Outgassing Pollution]
Patent: 6,843,833 →
Application: 10/250,229 →
Publication: US 2004/0250519
[Method of Stabilizing Material Layer]
Patent: 6,919,102 →
Application: 10/250,292 →
Publication: US 2004/0258840
Method for Forming a Titanium Nitride Layer
Patent: 6,893,963 →
Application: 10/408,070 →
Publication: US 2004/0198045
Automatic Transporting System and Method for Operating the Same
Patent: 6,745,102 →
Application: 10/410,735 →
Related Assignments (4)
Other recorded transfers of the patents in this record — the chain of ownership.
Change of Name Jun 28, 2019
From: POWERCHIP SEMICONDUCTOR CORP.
To: POWERCHIP TECHNOLOGY CORPORATION
Reel/Frame 049629/0170 →
Change of Name Jun 28, 2019
From: POWERCHIP SEMICONDUCTOR CORP.
To: POWERCHIP TECHNOLOGY CORPORATION
Reel/Frame 049629/0173 →
Assignment of Assignor's Interest Apr 8, 2020
From: POWERCHIP SEMICONDUCTOR MANUFACTURING CORPORATION
To: POWERCHIP TECHNOLOGY CORPORATION
Reel/Frame 052337/0735 →
Assignment of Assignor's Interest Sep 7, 2020
From: POWERCHIP TECHNOLOGY CORPORATION
To: NEXCHIP SEMICONDUCTOR CORPORATION
Reel/Frame 053704/0522 →