IP Library Granted Patent US 7,164,677
Granted Patent B2
US 7,164,677 · App. 10/138,496 · Granted Jan 16, 2007

Data switching system

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Quick Facts
Patent No.
US 7,164,677
App. No.
10/138,496
Granted
Jan 16, 2007
Kind
B2
Abstract

A data switching system comprising one or more I/O elements each comprising a plurality of first input/output ports adapted to receive and transmit data packets or cells to and from an external data network, and one or more second input/output ports adapted to receive and transmit data packets or cells, means for providing first routing information relating to at least one packet or cell to be output from one or more of the second port(s), each I/O element being adapted to transfer data packets or cells between the first ports and the second port(s) and to output data packets or cells comprising corresponding first routing information from the second port(s), a switching element having a plurality of third input/output ports being adapted to receive and transmit data packets or cells, the switching element comprising means for receiving on a third port a data packet or cell as well as the corresponding first routing information, determining, on the basis of the first routing information, port information indicating from which of the third ports the data packet or cell is to be output from the switching element, and outputting the data packet or cell from the third port(s) indicated by the port information, a second port of each I/O element being connected to a third port of the switching element.

Claims (68)

1. A data switching system comprising:

one or more I/O elements each comprising:

a plurality of first input/output ports configured to receive and transmit data packets or cells to and from an external data network;

one or more second input/output ports configured to receive and transmit data packets or cells;

routing device configured to provide a first routing information indicating at least one data packet or cell to be transmitted from one or more of the second ports; and

an arbiter configured to transmit a bitmap to the one or more I/O elements, where the bitmap comprises information for enabling or disabling the transmitting and/or receiving of data packets or cells by the one or more I/O elements;

wherein each of the one or more I/O elements is configured to transfer data packets or cells between the first ports and the second ports and to transmit data packets or cells comprising corresponding first routing information from the second ports;

a switching element having a plurality of third input/output ports configured to receive and transmit data packets or cells, the switching element comprising means for:

receiving on a third port a data packet or cell as well as the corresponding first routing information;

determining, on the basis of the first routing information, port information for the data packet or cell indicating which of the third ports is to transmit the data packet or cell; and

transmitting the data packet or cell from the third ports indicated by the port information;

wherein a second port of each of the one or more I/O elements is connected to a third port of the switching element.

2. A system according to claim 1 , wherein the routing device is configured to provide a second information, based on information derived from a particular data packet or cell received in a first I/O element from the external data network, indicating which of the first ports of a second I/O element, having received the particular data packet or cell from an indicated third port of the switching element, is to transmit the particular data packet or cell.

3. A system according to claim 2 , wherein the second information is transmitted from the first I/O element to the second I/O element.

4. A system according to claim 3 , wherein the second information is introduced into the particular data packet or cell by the first I/O element and the second I/O element is configured to derive the second information from the particular data packet or cell.

5. A system according to claim 1 , wherein the one or more I/O elements is configured to transmit data packets or cells between the first and second ports, and wherein the routing device is configured to provide a third information, derived from a particular data packet or cell received in the at least one I/O element from the external data network, indicating whether to:

transmit the particular data packet or cell from one of the first ports of the one or more I/O elements and/or

transmit the particular data packet or cell to the switching element via a second port of the one or more I/O elements.

6. A system according to claim 2 , wherein the first and any second information is added to the data packet or cell.

7. A system according to claim 6 , wherein the information is added as at least part of a preamble of the data packet or cell comprising a preamble, a header, and a payload.

8. A system according to claim 6 , wherein the information is added as at least part of a header of the data packet or cell comprising a preamble, a header, and a payload.

9. A system according to claim 1 , wherein each I/O element comprises a routing device.

10. A system according to claim 1 , wherein each of the first, second, and third ports comprises an I/O means for transmitting and receiving data packets or cells conforming to a predetermined standard.

11. A system according to claim 10 , wherein the I/O means of the second and third ports is configured to operate in one of two modes: one mode comprising transmission and reception of data packets or cells conforming to the predetermined standard; and the other mode comprising transmission and reception of data packets or cells comprising the first and/or second information.

12. A system according to claim 1 , wherein the determining means of the switching element further comprises means for providing, on the basis of information other than the first information of a data packet or cell received, information indicating which of the third ports is to transmit the data packet or cell.

13. A system according to claim 12 , wherein the providing means of the switching element further comprises:

a memory means comprising a number of entries each comprising routing information and output port information; and

means for:

comparing first routing information or other information from a received data packet or cell to information in one or more of the entries in the memory;

identifying one or more entries having corresponding routing information; and

providing output port information indicating the identified entry/entries.

14. A system according to claim 13 , wherein the routing device is configured to provide first routing information, wherein the first routing information is an element selected from a predetermined group of information elements comprising a maximum number of elements which are smaller than or identical to the number of entries of the memory means of the switching element.

15. A system according to claim 13 , wherein the switching element further comprises means for determining whether a received data packet or cell comprises first routing information and for, in that situation, deriving the first routing information or otherwise deriving other information from the data packet or cell; and wherein the memory means of the switching element is divided into a first group of entries wherein any entry having routing information corresponding to first routing information is identified and a second group of entries wherein any entry having routing information corresponding to other routing information is identified.

16. A system according to claim 15 , wherein the routing device is configured to provide first routing information comprising an element selected from a predetermined group of information elements comprising a maximum number of elements which are smaller than or identical to the number of entries of the first group of entries of the memory means of the switching element.

17. A method of switching data, the method comprising:

receiving a data packet or cell in a first I/O element comprising:

a plurality of first input/output ports configured to receive and transmit data packets or cells to and from an external data network; and

one or more second input/output ports configured to receive and transmit data packets or cells;

wherein the first I/O element is configured to transfer data packets or cells between the plurality of first ports and the one or more second ports;

transmitting a bitmap to an I/O element, where the bitmap comprises information for enabling or disabling the transmitting and/or receiving of data packets or cells by the I/O element;

providing first routing information indicating at least one data packet or cell to be transmitted from the one or more second ports;

transmitting the at least one data packet or cell comprising the first routing information from the one or more second ports of the first I/O element;

receiving the transmitted at least one data packet or cell and first routing information in a switching element having a plurality of third input/output ports configured to receive and transmit data packets or cells;

determining, on the basis of the first routing information, port information indicating which of the plurality of third ports is to transmit the at least one data packet or cell; and

transmitting the at least one data packet or cell from the plurality of third ports indicated by the port information.

18. A method according to claim 17 , further comprising providing second information, based on information derived from a data packet or cell received in the first I/O element from the external data network, indicating which of the first ports of a second I/O element, having received the data packet or cell from an indicated third port of the switching element, is to transmit the data packet or cell.

19. A method according to claim 18 , wherein the second information is transmitted from the first I/O element to the second I/O element.

20. A method according to claim 19 , wherein the second information is introduced into the data packet or cell by the first I/O element, and wherein the second I/O element derives the second information from the data packet or cell.

21. A method according to claim 17 , wherein at least one I/O element is configured to transmit data packets or cells between the first and second ports and wherein the method further comprises providing third information, derived from a data packet or cell received in the first I/O element from the external data network, indicating whether to:

transmit the data packet or cell from one of the first ports of the at least one I/O element and/or

transmit the data packet or cell to the switching element via a second port of the at least one I/O element.

22. A method according to claim 17 , further comprising adding the first and any second information to the data packet or cell.

23. A method according to claim 22 , wherein adding comprises adding the information as at least part of a preamble of the data packet or cell comprising a preamble, a header, and a payload.

24. A method according to claim 22 , wherein adding comprises adding the information as at least part of a header of the data packet or cell comprising a preamble, a header, and a payload.

25. A method of transmitting or receiving data packets or cells according to claim 17 , further comprising transmitting and receiving data packets or cells to and from each of the first, second, and third ports conforming to a predetermined standard.

26. A method according to claim 25 , further comprising operating the second and third ports in one of two modes, one mode comprising transmission and reception of data packets or cells conforming to the predetermined, standard and the other mode comprising transmission and reception of data packets or cells comprising the first and/or second information.

27. A method of determining information according to claim 17 , further comprising determining, on the basis of information other than any first information of a data packet or cell received, information indicating which of the third ports is to transmit the at least one data packet or cell.

28. A method of determining information according to claim 27 , wherein determining comprises:

comparing first routing information or other information from a received data packet or cell to information in one or more of the entries in a memory means comprising a number of entries each comprising routing information and output port information;

identifying one or more entries having corresponding routing information; and

providing output port information indicating the identified entry/entries.

29. A method according to claim 28 , wherein determining further comprises providing first routing information comprising an element selected from a predetermined group of information elements comprising a maximum number of elements which are smaller than or identical to the number of entries of the memory means of the switching element.

30. A method according to claim 28 , further comprising the steps of:

determining whether a received data packet or cell comprises first routing information and, in that situation, deriving the first routing information, or otherwise deriving other information from the data packet or cell; and

dividing the memory means into a first group of entries wherein any entry having routing information corresponding to first routing information is identified and a second group of entries wherein any entry having routing information corresponding to other routing information is identified.

31. A method according to claim 30 , further comprising providing first routing information comprising an element selected from a predetermined group of information elements comprising a maximum number of elements which are smaller than or identical to the number of entries of the first group of entries of the memory means of the switching element.

32. A switching element for use in the system according to claim 1 .

33. An I/O element for use in the system according to claim 1 .

Assignments (25)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
RELEASE OF SECURITY INTEREST Recorded May 29, 2018
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.), INC.; MICROSEMI FREQUENCY AND TIME CORPORATION; MICROSEMI COMMUNICATIONS, INC.; MICROSEMI SOC CORP.; MICROSEMI CORP. - POWER PRODUCTS GROUP; MICROSEMI CORP. - RF INTEGRATED SOLUTIONS
Reel/Frame 046251/0391 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 22, 2017
From: MICROSEMI COMMUNICATIONS, INC.
To: MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 042523/0577 →
PATENT SECURITY AGREEMENT Recorded Feb 3, 2016
From: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC. (F/K/A LEGERITY, INC., ZARLINK SEMICONDUCTOR (V.N.) INC., CENTELLAX, INC., AND ZARLINK SEMICONDUCTOR (U.S.) INC.); MICROSEMI FREQUENCY AND TIME CORPORATION (F/K/A SYMMETRICON, INC.); MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION); MICROSEMI SOC CORP. (F/K/A ACTEL CORPORATION); MICROSEMI CORP. - POWER PRODUCTS GROUP (F/K/A ADVANCED POWER TECHNOLOGY INC.); MICROSEMI CORP. - RF INTEGRATED SOLUTIONS (F/K/A AML COMMUNICATIONS, INC.)
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037691/0697 →
RELEASE OF SECURITY INTEREST Recorded Jan 19, 2016
From: BANK OF AMERICA, N.A.
To: MICROSEMI CORPORATION; MICROSEMI CORP.-ANALOG MIXED SIGNAL GROUP, A DELAWARE CORPORATION; MICROSEMI SOC CORP., A CALIFORNIA CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC., A DELAWARE CORPORATION; MICROSEMI FREQUENCY AND TIME CORPORATION, A DELAWARE CORPORATION; MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION), A DELAWARE CORPORATION; MICROSEMI CORP.-MEMORY AND STORAGE SOLUTIONS (F/K/A WHITE ELECTRONIC DESIGNS CORPORATION), AN INDIANA CORPORATION
Reel/Frame 037558/0711 →
MERGER AND CHANGE OF NAME Recorded May 13, 2015
From: VITESSE SEMICONDUCTOR CORPORATION; LLIU100 ACQUISITION CORP.
To: MICROSEMI COMMUNICATIONS, INC.
Reel/Frame 035651/0708 →
SUPPLEMENTAL SECURITY AGREEMENT Recorded Apr 29, 2015
From: MICROSEMI COMMUNICATIONS, INC.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 035532/0925 →
RELEASE OF SECURITY INTEREST Recorded Apr 28, 2015
From: WHITEBOX VSC, LTD.
To: VITESSE SEMICONDUCTOR CORPORATION
Reel/Frame 035526/0090 →
RELEASE OF SECURITY INTEREST Recorded Nov 5, 2014
From: US BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: VITESSE SEMICONDUCTOR CORPORATION
Reel/Frame 034176/0162 →
COLLATERAL ASSIGNMENT (INTELLECTUAL PROPERTY) Recorded Nov 5, 2009
From: VITESSE SEMICONDUCTOR CORPORATION
To: U.S. BANK NATIONAL ASSOCIATION
Reel/Frame 023471/0267 →
RELEASE OF SECURITY INTEREST Recorded Oct 29, 2009
From: OBSIDIAN, LLC
To: VITESSE SEMICONDUCTOR CORPORATION; VLTESSE INTERNATIONAL, INC.; VITESSE MANUFACTURING & DEVELOPMENT CORPORATION; VITESSE SEMICONDUCTOR SALES CORPORATION
Reel/Frame 023438/0587 →
SECURITY AGREEMENT Recorded Oct 22, 2009
From: VITESSE SEMICONDUCTOR CORPORATION
To: WHITEBOX VSC, LTD.
Reel/Frame 023401/0813 →
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2009
From: OBSIDIAN, LLC
To: VITESSE SEMICONDUCTOR CORPORATION
Reel/Frame 023373/0053 →
SECURITY AGREEMENT Recorded Jun 29, 2006
From: VITESSE SEMICONDUCTOR CORPORATION
To: OBSIDIAN, LLC, AS COLLATERAL AGENT
Reel/Frame 017846/0847 →