IP Library › Granted Patent US 7,003,228
Granted Patent B2
US 7,003,228 · App. 10/677,123 · Granted Feb 21, 2006

Method and apparatus for improved high-speed adaptive equalization

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Quick Facts
Patent No.
US 7,003,228
App. No.
10/677,123
Granted
Feb 21, 2006
Kind
B2
Abstract

Improved high-speed adaptive equalization is presented that may involve converting an optical signal into an electrical signal and performing equalization by (i) filtering the electrical signal with an analog filter according to at least one filter coefficient to produce a filtered output, (ii) generating an error signal from the filtered output according to an error function, (iii) providing at least one control signal to the analog filter for adjusting the at least one filter coefficient, (iv) detecting a relationship between a change in the at least one filter coefficient and a change in the error signal, and (v) adjusting the at least one filter coefficient according to the relationship to minimize the error signal. The least one coefficient may comprise a plurality of coefficients, and the relationship may be a gradient estimate having multiple components, each determined by varying only one of the coefficients and detecting a resulting change in the error signal.

Claims (46)

1. An apparatus for processing an optical signal comprising:

an optical-to-electrical conversion module for receiving the optical signal and converting the optical signal into an electrical signal; and

an adaptive equalizer module coupled to the optical-to-electrical conversion module for performing equalization on the electrical signal to produce an equalized signal, the adaptive equalization module comprising:

i. an analog filter adapted to receive and filter the electrical signal to produce a filtered output according to at least one filter coefficient,

ii. an error generator adapted to receive the filtered output and generate an error signal from the filtered output according to an error function, and

iii. a controller adapted to receive the error signal and provide at least one control signal to the analog filter for adjusting the at least one filter coefficient, the controller further adapted to detect a relationship between a change in the at least one filter coefficient and a change in the error signal and adjust the at least one filter coefficient according to the relationship to minimize the error signal,

wherein the error function involves:

performing a first sign-removal operation on the filtered output to produce a first sign-removed signal;

generating a difference signal representing difference between the first sign-removed signal and a steady signal; and

performing a second sign-removal operation on the difference signal to produce a second sign-removed signal;

outputting the second sign-removed signal as the error signal.

2. The apparatus of claim 1 wherein the first sign-removal operation represents a squaring operation.

3. The apparatus of claim 1 wherein the first sign-removal operation represents an absolute value operation.

4. The apparatus of claim 3 wherein the absolute value operation is carried out by multiplying a delayed version of the filtered output wit a amplitude-limited version of the filtered output.

5. The apparatus of claim 4 wherein the amplitude-limited version of the filtered output is produced by processing the filtered output using a limiting amplifier.

6. The apparatus of claim 1 wherein the second sign-removal operation represents a squaring operation.

7. The apparatus of claim 1 wherein the second sign-removal operation represents an absolute value operation.

8. The apparatus of claim 7 wherein the absolute value operation is carried out by multiplying a delayed version of the filtered output with a amplitude-limited version of the filtered output.

9. The apparatus of claim 8 wherein the amplitude-limited version of the filtered output is produced by processing the filtered output using a limiting amplifier.

10. The apparatus of claim 1 wherein the steady signal is fixed at a constant value.

11. The apparatus of claim 1 wherein the error function operates on a clocked version of the filtered output.

12. The apparatus of claim 11 wherein the error function operates on an un-clocked version of the filtered output.

13. The apparatus of claim 11 wherein the at least one control signal is analog.

14. The apparatus of claim 11 wherein the at least one control signal is digital.

15. A method for processing an optical signal comprising:

converting the optical signal into an electrical signal; and

performing equalization on the electrical signal to produce an equalized signal, the equalization performance step comprising:

i. filtering the electrical signal with an analog filter according to at least one filter coefficient to produce a filtered output,

ii. generating an error signal from the filtered output according to an error function,

iii. providing at least one control signal to the analog filter for adjusting the at least one filter coefficient,

iv. detecting a relationship between a change in the at least one filter coefficient and a change in the error signal, and

v. adjusting the at least one filter coefficient according to the relationship to minimize the error signal

wherein the error function involves:

performing a first sign-removal operation on the filtered output to produce a first sign-removed signal;

generating a difference signal representing difference between the first sign-removed signal and a steady signal; and

performing a second sign-removal operation on the difference signal to produce a second sign-removed signal;

outputting the second sign-removed signal as the error signal.

16. The method of claim 15 wherein the first sign-removal operation represents a squaring operation.

17. The method of claim 15 wherein the first sign-removal operation represents an absolute value operation.

18. The method of claim 17 wherein the absolute value operation is carried out by multiplying a delayed version of the filtered output with a amplitude-limited version of the filtered output.

19. The method of claim 18 wherein the amplitude-limited version of the filtered output is produced by processing the filtered output using a limiting amplifier.

20. The method of claim 15 wherein the second sign-removal operation represents a squaring operation.

21. The method of claim 15 wherein the second sign-removal operation represents an absolute value operation.

22. The method of claim 21 wherein the absolute value operation is carried out by multiplying a delayed version of the filtered output with a amplitude-limited version of the filtered output.

23. The method of claim 22 wherein the amplitude-limited version of the filtered output is produced by processing the filtered output using a limiting amplifier.

24. The method of claim 15 wherein the steady signal is fixed at a constant value.

Assignments (27)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
RELEASE OF SECURITY INTEREST Recorded May 29, 2018
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.), INC.; MICROSEMI FREQUENCY AND TIME CORPORATION; MICROSEMI COMMUNICATIONS, INC.; MICROSEMI SOC CORP.; MICROSEMI CORP. - POWER PRODUCTS GROUP; MICROSEMI CORP. - RF INTEGRATED SOLUTIONS
Reel/Frame 046251/0391 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 22, 2017
From: MICROSEMI COMMUNICATIONS, INC.
To: MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 042523/0577 →
PATENT SECURITY AGREEMENT Recorded Feb 3, 2016
From: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC. (F/K/A LEGERITY, INC., ZARLINK SEMICONDUCTOR (V.N.) INC., CENTELLAX, INC., AND ZARLINK SEMICONDUCTOR (U.S.) INC.); MICROSEMI FREQUENCY AND TIME CORPORATION (F/K/A SYMMETRICON, INC.); MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION); MICROSEMI SOC CORP. (F/K/A ACTEL CORPORATION); MICROSEMI CORP. - POWER PRODUCTS GROUP (F/K/A ADVANCED POWER TECHNOLOGY INC.); MICROSEMI CORP. - RF INTEGRATED SOLUTIONS (F/K/A AML COMMUNICATIONS, INC.)
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037691/0697 →
RELEASE OF SECURITY INTEREST Recorded Jan 19, 2016
From: BANK OF AMERICA, N.A.
To: MICROSEMI CORPORATION; MICROSEMI CORP.-ANALOG MIXED SIGNAL GROUP, A DELAWARE CORPORATION; MICROSEMI SOC CORP., A CALIFORNIA CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC., A DELAWARE CORPORATION; MICROSEMI FREQUENCY AND TIME CORPORATION, A DELAWARE CORPORATION; MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION), A DELAWARE CORPORATION; MICROSEMI CORP.-MEMORY AND STORAGE SOLUTIONS (F/K/A WHITE ELECTRONIC DESIGNS CORPORATION), AN INDIANA CORPORATION
Reel/Frame 037558/0711 →
MERGER AND CHANGE OF NAME Recorded May 13, 2015
From: VITESSE SEMICONDUCTOR CORPORATION; LLIU100 ACQUISITION CORP.
To: MICROSEMI COMMUNICATIONS, INC.
Reel/Frame 035651/0708 →
SUPPLEMENTAL SECURITY AGREEMENT Recorded Apr 29, 2015
From: MICROSEMI COMMUNICATIONS, INC.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 035532/0925 →
RELEASE OF SECURITY INTEREST Recorded Apr 28, 2015
From: WHITEBOX VSC, LTD.
To: VITESSE SEMICONDUCTOR CORPORATION
Reel/Frame 035526/0090 →
RELEASE OF SECURITY INTEREST Recorded Nov 5, 2014
From: US BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: VITESSE SEMICONDUCTOR CORPORATION
Reel/Frame 034176/0162 →
COLLATERAL ASSIGNMENT (INTELLECTUAL PROPERTY) Recorded Nov 5, 2009
From: VITESSE SEMICONDUCTOR CORPORATION
To: U.S. BANK NATIONAL ASSOCIATION
Reel/Frame 023471/0267 →
SECURITY AGREEMENT Recorded Oct 22, 2009
From: VITESSE SEMICONDUCTOR CORPORATION
To: WHITEBOX VSC, LTD.
Reel/Frame 023401/0813 →
RELEASE OF SECURITY INTEREST Recorded Nov 14, 2007
From: OBSIDIAN, LLC, AS COLLATERAL AGENT
To: VITESSE SEMICONDUCTOR CORPORATION
Reel/Frame 020112/0306 →
SECURITY AGREEMENT Recorded Jun 29, 2006
From: VITESSE SEMICONDUCTOR CORPORATION
To: OBSIDIAN, LLC, AS COLLATERAL AGENT
Reel/Frame 017846/0847 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2005
From: INFINERA ACQUISITION CORPORATION
To: VITESSE SEMICONDUCTOR CORPORATION
Reel/Frame 016851/0823 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 16, 2005
From: BIG BEAR NETWORKS, INC.
To: INFINERA ACQUISITION CORPORATION
Reel/Frame 016789/0960 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 25, 2004
From: WANG, JOHN S.; BHOJA, SUDEEP; PAVAN, SHANTHI; TAO, HAI
To: BIG BEAR NETWORKS
Reel/Frame 015135/0383 →