Bonded memory devices and methods of making the same
A method of forming a magnetoresistive random access memory (MRAM) device includes providing a first die containing a selector material layer located over a first substrate, providing a second die containing a MRAM layer stack located over a second substrate, and bonding the first die to the second die.
1 . A memory device, comprising:
a first electrically conductive line;
a second electrically conductive line; and
a memory pillar stack located between the first and the second electrically conductive lines, wherein:
the memory pillar stack comprises a selector pillar structure bonded to a magnetic tunnel junction (MTJ) pillar structure comprising a ferromagnetic reference layer, a tunnel barrier layer, a ferromagnetic free layer, and a junction-side bonding plate comprising second metallic bonding material;
the selector pillar structure comprises a material functioning as a voltage-dependent switch, and a selector-side bonding pad comprising a first metallic bonding material; and
a bonding interface at which the junction-side bonding plate is bonded to the selector-side bonding pad by metal-to-metal bonding is located between the selector pillar structure and the MTJ pillar structure.
2 . The memory device of claim 1 , wherein:
the first electrically conductive line laterally extends along a first horizontal direction over a substrate and contacts a bottom end of the memory pillar structure; and
the second electrically conductive line laterally extends along a second horizontal direction and contacts a top end of the memory pillar structure.
3 . The memory device of claim 2 , wherein the memory pillar stack comprises straight sidewalls that vertically extend straight from the first electrically conductive line to the second electrically conductive line and are free of any lateral steps.
4 . The memory device of claim 3 , wherein the memory pillar stack is laterally surrounded by a dielectric matrix having a homogeneous material composition throughout, and vertically extending from the first electrically conductive line to the second electrically conductive line.
5 . The memory device of claim 1 , wherein:
the selector pillar structure comprises a selector material plate and a selector-side bonding plate;
the MTJ pillar structure comprises a junction-side bonding plate; and
the selector-side bonding plate is bonded to the junction-side bonding plate with the bonding interface located therebetween.
6 . The memory device of claim 5 , wherein the selector material plate comprises an ovonic threshold switch material plate located between upper and lower electrode plates.
7 . The memory device of claim 1 , wherein the ferromagnetic free layer is located more proximal to the bonding interface than the ferromagnetic reference layer is to the bonding interface.
8 . The memory device of claim 1 , wherein sidewalls of the selector pillar structure are laterally offset from sidewalls of the MTJ pillar structure, and wherein an extent of the offset is less than a width of the MTJ pillar structure.
9 . The memory device of claim 1 , wherein:
the selector pillar structure comprises first straight sidewalls that vertically extend straight from the first electrically conductive line to the bonding interface;
the MTJ pillar structure comprises second straight sidewalls that vertically extend from the bonding interface to the second electrically conductive line; and
the second straight sidewalls are laterally offset from the first straight sidewalls.
10 . The memory device of claim 1 , wherein:
the selector pillar structure is laterally surrounded by a first dielectric matrix having a first homogeneous material composition; and
the MTJ pillar structure is laterally surrounded by a second dielectric matrix having a second homogeneous material composition;
a periphery of a first planar surface of the first dielectric matrix within the bonding interface is laterally offset from a periphery of a second planar surface of the second dielectric matrix within the bonding interface; and
an extent of the offset is less than a width of the MTJ pillar structure.
11 . The memory device of claim 1 , wherein the bonding interface is located between the selector pillar structure and the free layer of the MTJ pillar structure.
12 . The memory device of claim 11 , wherein the selector pillar structure comprises a stack including a first electrode plate comprising a first non-metallic conductive material, a second electrode plate comprising a second non-metallic conductive material, and a selector material plate located between the first electrode plate and the second electrode plate.
13 . The memory device of claim 12 , wherein each of the first non-metallic conductive material and the second non-metallic conductive material is selected from amorphous carbon, amorphous boron-doped carbon, amorphous nitrogen-doped carbon, amorphous silicon, amorphous germanium, alloys thereof, or layer stacks thereof.
14 . The memory device of claim 1 , wherein the MTJ pillar structure further comprises a capping dielectric layer in contact with the ferromagnetic free layer, and the capping dielectric layer is located between the ferromagnetic free layer and the bonding interface.
15 . The memory device of claim 1 , wherein:
the magnetic tunnel junction pillar structure comprises a nonmagnetic metal capping layer in direct contact with the capping dielectric layer and the junction-side bonding plate;
the selector pillar structure is laterally surrounded by a first dielectric matrix comprising a first dielectric material;
the magnetic tunnel junction pillar structure is laterally surrounded by a second dielectric matrix comprising a second dielectric material;
the second dielectric material is bonded to the first dielectric matrix material by dielectric-to-dielectric bonding at a dielectric bonding interface that is located within a same horizontal plane as the bonding interface; and
a periphery of a horizontal surface of the selector-side bonding pad within a horizontal plane including the bonding interface is laterally offset relative to a periphery of a horizontal surface of the junction-side bonding plate within the horizontal plane.
16 . A memory system, comprising:
data control circuits;
data reading and writing circuits;
data error correction circuits;
a temperature monitoring circuit; and
an array of non-volatile memory elements,
wherein each non-volatile memory element comprises a magnetic tunnel junction (MTJ) and a selector device;
wherein the MTJ comprises a ferromagnetic reference layer, a tunnel barrier layer, a ferromagnetic free layer, and a junction-side bonding plate comprising a second metallic bonding material;
wherein the selector device comprises a material portion functioning as a voltage-dependent switch, and a selector-side bonding pad comprising a first metallic bonding material; and
wherein a bonding interface at which the junction-side bonding plate is bonded to the selector-side bonding pad by metal-to-metal bonding is located between the MTJ and the selector device.
17 . The memory system of claim 16 , wherein:
the selector device is laterally offset from the MTJ; and
an extent of the offset is less than a width of the MTJ.
18 . The memory device of claim 16 , wherein the bonding interface is located between the selector device and the free layer of the MTJ.
19 . The memory device of claim 18 , wherein the selector device comprises a stack including a first electrode plate comprising a first non-metallic conductive material, a second electrode plate comprising a second non-metallic conductive material, and a selector material plate located between the first electrode plate and the second electrode plate.
20 . The memory device of claim 19 , wherein each of the first non-metallic conductive material and the second non-metallic conductive material is selected from amorphous carbon, amorphous boron-doped carbon, amorphous nitrogen-doped carbon, amorphous silicon, amorphous germanium, alloys thereof, or layer stacks thereof.